[Advances in Intelligent Systems and Computing] Proceedings of the Global AI Congress 2019 Volume 1112 || Multi-Arc ProcessorâHarnessing Pseudo-concurrent Multiple Instruction Set Architecture (ISA) Over a Single Hardware Platform
Mandal, Jyotsna Kumar, Mukhopadhyay, SomnathVolume:
10.1007/97
Year:
2020
Language:
english
DOI:
10.1007/978-981-15-2188-1_42
File:
PDF, 504 KB
english, 2020