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FPGA-Based High-Resolution DPWM Scheme Using Interleaving of Phase-Shifted Clock Pulses
Bhardwaj, Kritika, Singh, Alok, Borage, Mangesh, Ajnar, D. S., Tiwari, SunilVolume:
101
Journal:
Journal of The Institution of Engineers (India): Series B
DOI:
10.1007/s40031-020-00438-9
Date:
April, 2020
File:
PDF, 1.82 MB
2020