Iterative-Gradient Based Complex Divider FPGA Core with...

Journal of Signal Processing Systems 2011 / 03 Vol. 62; Iss. 3

Iterative-Gradient Based Complex Divider FPGA Core with Dynamic Configurability of Accuracy and Throughput

F. Javier López-Martínez, Eduardo del Castillo-Sánchez, José Tomás Entrambasaguas, Eduardo Martos-Naya
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Volume:
62
Language:
english
Pages:
6
DOI:
10.1007/s11265-010-0464-y
Date:
March, 2011
File:
PDF, 406 KB
english, 2011
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