A 0.506-pJ 16-kb 8T SRAM With Vertical Read Wordlines and...

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IEEE Transactions on Very Large Scale Integration (VLSI) Systems 2020

A 0.506-pJ 16-kb 8T SRAM With Vertical Read Wordlines and Selective Dual Split Power Lines

Lu, Lu, Yoo, Taegeun, Le, Van Loi, Kim, Tony Tae-Hyoung
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Year:
2020
Journal:
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
DOI:
10.1109/tvlsi.2019.2956232
File:
PDF, 3.36 MB
2020
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