FPGA implementation of a critical railway interlocking...

IEEE Latin America Transactions 2020 / 2 Vol. 18; Iss. 02

FPGA implementation of a critical railway interlocking system

Martin Nicolas, Menendez, Facundo Santiago, Larosa, Ramiro Adrian, Ghignone, Nicolas, Alvarez, Ariel, Lutenberg
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Volume:
18
Journal:
IEEE Latin America Transactions
DOI:
10.1109/TLA.2020.9085282
Date:
February, 2020
File:
PDF, 789 KB
2020
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