![](/img/cover-not-exists.png)
Power consumption reduction in a SDR based wireless communication system using partial reconfigurable FPGA
Joseph, NeenuVolume:
3
Journal:
International Journal of VLSI Design & Communication Systems
DOI:
10.5121/vlsic.2012.3217
Date:
April, 2012
File:
PDF, 2.09 MB
2012