A 100 MHz, 0.8-to-1.1 V, 170 mA Digital LDO with 8-Cycles Mean Settling Time and 9-Bit Regulating Resolution in 180-nm CMOS
Yuan, Zheyi, Fan, Shiquan, Yuan, Chenxi, Geng, LiYear:
2020
Journal:
IEEE Transactions on Circuits and Systems II: Express Briefs
DOI:
10.1109/TCSII.2020.3001351
File:
PDF, 980 KB
2020