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Device and Circuit Level Design, Characterization and Implementation of Low Power 7T SRAM Cell using Heterojunction Tunneling Transistors with Oxide Overlap
Satyanarayana, B.V.V., Durga Prakash, M.Volume:
77
Journal:
Microprocessors and Microsystems
DOI:
10.1016/j.micpro.2020.103164
Date:
September, 2020
File:
PDF, 2.76 MB
2020