Interconnect-Aware Area and Energy Optimization for In-Memory Acceleration of DNNs
Krishnan, Gokul, Mandal, Sumit K., Chakrabarti, Chaitali, Seo, Jae-sun, Ogras, Umit Y., Cao, YuYear:
2020
Journal:
IEEE Design & Test
DOI:
10.1109/MDAT.2020.3001559
File:
PDF, 663 KB
2020