Memory-Logic Hybrid Gate With 3-D Stackable Complementary...

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IEEE Transactions on Electron Devices 2020

Memory-Logic Hybrid Gate With 3-D Stackable Complementary Latches

Lee, Chieh, Chih, Yue-Der, Chang, Jonathan, Lin, Chrong Jung, King, Ya-Chin
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Year:
2020
Journal:
IEEE Transactions on Electron Devices
DOI:
10.1109/TED.2020.3000737
File:
PDF, 1.83 MB
2020
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