![](/img/cover-not-exists.png)
Vertically Extended Drain Double Gate Si1âxGex Source Tunnel FET : Proposal & Investigation For Optimized Device Performance
Raj, Anand, Singh, Sangeeta, Priyadarshani, Kumari Nibha, Arya, Rajeev, Naugarhiya, AlokJournal:
Silicon
DOI:
10.1007/s12633-020-00603-1
Date:
July, 2020
File:
PDF, 3.87 MB
2020