A Communication-Aware DNN Accelerator on ImageNet Using in-Memory Entry-Counting Based Algorithm-Circuit-Architecture Co-Design in 65nm CMOS
Zhu, Haozhe, Chen, Chixiao, Liu, Shiwei, Zou, Qiaosha, Wang, Mingyu, Zhang, Lihua, Zeng, Xiaoyang, Shi, C.-J. RichardYear:
2020
Journal:
IEEE Journal on Emerging and Selected Topics in Circuits and Systems
DOI:
10.1109/JETCAS.2020.3014920
File:
PDF, 10.08 MB
2020