[IEEE 2020 24th International Symposium on VLSI Design and...

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[IEEE 2020 24th International Symposium on VLSI Design and Test (VDAT) - Bhubaneswar, India (2020.7.23-2020.7.25)] 2020 24th International Symposium on VLSI Design and Test (VDAT) - A 10-bit 500 MSPS Segmented CS-DAC of > 77 dB SFDR upto the Nyquist with Hexa-decal biasing

Samanta, Smrutilekha, Sarkar, Santanu
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Year:
2020
DOI:
10.1109/VDAT50263.2020.9190402
File:
PDF, 323 KB
2020
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