[IEEE 2020 24th International Symposium on VLSI Design and Test (VDAT) - Bhubaneswar, India (2020.7.23-2020.7.25)] 2020 24th International Symposium on VLSI Design and Test (VDAT) - Twin-Coupled Sense Amplifier to improve margin in 1T-1MTJ based MRAM array
Monga, Kanika, Maheshwari, Lakshaya, Chaturvedi, Nitin, Gurunarayanan, S.Year:
2020
DOI:
10.1109/VDAT50263.2020.9190177
File:
PDF, 502 KB
2020