Study of parasitic oscillation of a multi-chip SiC MOSFET...

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Solid-State Electronics 2020 / 9

Study of parasitic oscillation of a multi-chip SiC MOSFET circuit based on a signal flow graph model by TCAD simulation

Kono, Hiroshi, Omura, Ichiro
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Journal:
Solid-State Electronics
DOI:
10.1016/j.sse.2020.107884
Date:
September, 2020
File:
PDF, 2.39 MB
2020
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