A 2.5-GHz Clock Recovery Circuit Based on a...

  • Main
  • 2020
  • A 2.5-GHz Clock Recovery Circuit Based on a...
IEEE Solid-State Circuits Letters 2020

A 2.5-GHz Clock Recovery Circuit Based on a Back-Bias-Controlled Oscillator in 28nm FDSOI

Schramme, Maxime, Gimeno, Cecilia, Cathelin, Andreia, Flandre, Denis, Bol, David
How much do you like this book?
What’s the quality of the file?
Download the book for quality assessment
What’s the quality of the downloaded files?
Year:
2020
Journal:
IEEE Solid-State Circuits Letters
DOI:
10.1109/LSSC.2020.3026759
File:
PDF, 2.60 MB
2020
Conversion to is in progress
Conversion to is failed