StereoEngine: An FPGA-based Accelerator for Real-Time High-quality Stereo Estimation with Binary Neural Network
Chen, Gang, Ling, Yehua, He, Tao, Meng, Haitao, He, Shengyu, Zhang, Yu, Huang, KaiYear:
2020
Journal:
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
DOI:
10.1109/TCAD.2020.3012864
File:
PDF, 9.76 MB
2020