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ReLAccS: A Multi-level Approach to Accelerator Design for...

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ReLAccS: A Multi-level Approach to Accelerator Design for Reinforcement Learning on FPGA-based Systems

Baranwal, Akhil Raj, Ullah, Salim, Sahoo, Siva Satyendra, Kumar, Akash
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Year:
2020
Journal:
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
DOI:
10.1109/tcad.2020.3028350
File:
PDF, 3.17 MB
2020
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