ReLAccS: A Multi-level Approach to Accelerator Design for Reinforcement Learning on FPGA-based Systems
Baranwal, Akhil Raj, Ullah, Salim, Sahoo, Siva Satyendra, Kumar, AkashYear:
2020
Journal:
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
DOI:
10.1109/tcad.2020.3028350
File:
PDF, 3.17 MB
2020