Design of an ultra-low power, low complexity and low jitter...

Design of an ultra-low power, low complexity and low jitter PLL with digitally controlled oscillator

Anushkannan, N.K., Mangalam, H.
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Volume:
15
Year:
2020
Journal:
International Journal of Advanced Intelligence Paradigms
DOI:
10.1504/ijaip.2020.104110
File:
PDF, 530 KB
2020
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