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Verification of CDM circuit simulation using an ESD evaluation circuit
M. Etherton, J. Willemen, W. Wilkening, N. Qu, S. Mettler, W. FichtnerVolume:
47
Year:
2007
Language:
english
Pages:
8
DOI:
10.1016/j.microrel.2006.11.006
File:
PDF, 932 KB
english, 2007