Feasible approach for processes integration of CMOS...

Microelectronics Reliability 2010 Vol. 50; Iss. 12

Feasible approach for processes integration of CMOS transistor gate/side-wall spacer patterning fabrication

Chun-Jen Weng
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Volume:
50
Year:
2010
Language:
english
Pages:
10
DOI:
10.1016/j.microrel.2010.07.010
File:
PDF, 2.62 MB
english, 2010
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