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Processing assessment and adhesion evaluation of copper through-silicon vias (TSVs) for three-dimensional stacked-integrated circuit (3D-SIC) architectures
Y. Yang, R. Labie, F. Ling, C. Zhao, A. Radisic, J. Van Olmen, Y. Travaly, B. Verlinden, I. De WolfVolume:
50
Year:
2010
Language:
english
Pages:
5
DOI:
10.1016/j.microrel.2010.07.019
File:
PDF, 677 KB
english, 2010