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Memory based architecture and its implementation scheme named bit-parallel block-parallel functional memory type parallel processor BPBP FMPP
Keikichi Tamaru, Kazutoshi Kobayashi, Hidetoshi OnoderaVolume:
24
Year:
1998
Language:
english
Pages:
15
DOI:
10.1016/s0045-7906(97)00039-6
File:
PDF, 2.76 MB
english, 1998