Testing CMOS combinational iterative logic arrays for...

Integration, the VLSI Journal 1996 Vol. 21; Iss. 3

Testing CMOS combinational iterative logic arrays for realistic faults

Dimitris Gizopoulos, Dimitris Nikolos, Antonis Paschalis
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Volume:
21
Year:
1996
Language:
english
Pages:
20
DOI:
10.1016/s0167-9260(96)00000-4
File:
PDF, 1.11 MB
english, 1996
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