Volume 2012

VLSI Design

Volume 2012
2

FastRoute: An Efficient and High-Quality Global Router

Pan, Min, Xu, Yue, Zhang, Yanheng, Chu, Chris
Journal:
VLSI Design
Year:
2012
Language:
english
File:
PDF, 1.53 MB
english, 2012
3

A ±6 ms-Accuracy, 0.68 mm 2 , and 2.21  μ W QRS Detection ASIC

Huang, Sheng-Chieh, Wang, Hui-Min, Chen, Wei-Yu
Journal:
VLSI Design
Year:
2012
Language:
english
File:
PDF, 299 KB
english, 2012
5

A Graph-Based Approach to Optimal Scan Chain Stitching Using RTL Design Descriptions

Zaourar, Lilia, Kieffer, Yann, Aktouf, Chouki
Journal:
VLSI Design
Year:
2012
Language:
english
File:
PDF, 1.37 MB
english, 2012
6

Flexible LDPC Decoder Architectures

Awais, Muhammad, Condo, Carlo
Journal:
VLSI Design
Year:
2012
Language:
english
File:
PDF, 1.53 MB
english, 2012
7

Design Space of Flexible Multigigabit LDPC Decoders

Schläfer, Philipp, Weis, Christian, Wehn, Norbert, Alles, Matthias
Journal:
VLSI Design
Year:
2012
Language:
english
File:
PDF, 1.76 MB
english, 2012
15

9T Full Adder Design in Subthreshold Region

Singh, Shiwani, Sharma, Tripti, Sharma, K. G., Singh, B. P.
Journal:
VLSI Design
Year:
2012
Language:
english
File:
PDF, 1.35 MB
english, 2012
16

A New Length-Based Algebraic Multigrid Clustering Algorithm

Rakai, L., Farshidi, A., Behjat, L., Westwick, D.
Journal:
VLSI Design
Year:
2012
Language:
english
File:
PDF, 1.42 MB
english, 2012
17

Modeling and Design of a Nano Scale CMOS Inverter for Symmetric Switching Characteristics

Mukhopadhyay, Joyjit, Pandit, Soumya
Journal:
VLSI Design
Year:
2012
Language:
english
File:
PDF, 2.19 MB
english, 2012
18

Redundant Logic Insertion and Latency Reduction in Self-Timed Adders

Balasubramanian, P., Edwards, D. A., Toms, W. B.
Journal:
VLSI Design
Year:
2012
Language:
english
File:
PDF, 1.73 MB
english, 2012
19

Hardware Design Considerations for Edge-Accelerated Stereo Correspondence Algorithms

Ttofis, Christos, Theocharides, Theocharis
Journal:
VLSI Design
Year:
2012
Language:
english
File:
PDF, 10.08 MB
english, 2012
20

Absolute Difference and Low-Power Bus Encoding Method for LCD Digital Display Interfaces

Fang, Chia-Hao, Lung, I-tao, Fan, Chih-Peng
Journal:
VLSI Design
Year:
2012
Language:
english
File:
PDF, 1.46 MB
english, 2012
23

A Signature-Based Power Model for MPSoC on FPGA

Piscitelli, Roberta, Pimentel, Andy D.
Journal:
VLSI Design
Year:
2012
Language:
english
File:
PDF, 3.58 MB
english, 2012
24

Low Cost Design of a Hybrid Architecture of Integer Inverse DCT for H.264, VC-1, AVS, and HEVC

Martuza, Muhammad, Wahid, Khan A.
Journal:
VLSI Design
Year:
2012
Language:
english
File:
PDF, 1.59 MB
english, 2012
28

Communication and Memory Architecture Design of Application-Specific High-End Multiprocessors

Jan, Yahya, Jóźwiak, Lech
Journal:
VLSI Design
Year:
2012
Language:
english
File:
PDF, 2.26 MB
english, 2012
30

An Efficient Multi-Core SIMD Implementation for H.264/AVC Encoder

Bariani, M., Lambruschini, P., Raggio, M.
Journal:
VLSI Design
Year:
2012
Language:
english
File:
PDF, 1.85 MB
english, 2012
31

Line Search-Based Inverse Lithography Technique for Mask Design

Zhao, Xin, Chu, Chris
Journal:
VLSI Design
Year:
2012
Language:
english
File:
PDF, 1.99 MB
english, 2012
34

Low-Complexity Hardware Interleaver/Deinterleaver for IEEE 802.11a/g/n WLAN

Zhang, Zhen-dong, Wu, Bin, Zhou, Yu-mei, Zhang, Xin
Journal:
VLSI Design
Year:
2012
Language:
english
File:
PDF, 1.92 MB
english, 2012
35

Cognitive Radio RF: Overview and Challenges

Nguyen, Van Tam, Villain, Frederic, Le Guillou, Yann
Journal:
VLSI Design
Year:
2012
Language:
english
File:
PDF, 1.76 MB
english, 2012