Volume 12; Issue 3

ACM SIGARCH Computer Architecture News

Volume 12; Issue 3
2

A state-of-the-art SIMD two-dimensional FFT array processor

Yasrebi, Mehrad, Lipovski, G. J.
Journal:
ACM SIGARCH Computer Architecture News
Year:
1984
Language:
english
File:
PDF, 478 KB
english, 1984
3

The architecture of replica

Ma, Y. W., Krishnamurti, R.
Journal:
ACM SIGARCH Computer Architecture News
Year:
1984
Language:
english
File:
PDF, 653 KB
english, 1984
4

A generalized object display processor architecture

Goldwasser, Samuel M.
Journal:
ACM SIGARCH Computer Architecture News
Year:
1984
Language:
english
File:
PDF, 952 KB
english, 1984
6

The design and implementation of a VLSI chess move generator

Ebeling, Carl, Palay, Andrew
Journal:
ACM SIGARCH Computer Architecture News
Year:
1984
Language:
english
File:
PDF, 668 KB
english, 1984
7

Instruction issue logic for pipelined supercomputers

Weiss, Shlomo, Smith, James E.
Journal:
ACM SIGARCH Computer Architecture News
Year:
1984
Language:
english
File:
PDF, 947 KB
english, 1984
8

Fast execution of loops with if statements

Banerjee, Utpal, Gajski, Daniel D.
Journal:
ACM SIGARCH Computer Architecture News
Year:
1984
Language:
english
File:
PDF, 515 KB
english, 1984
9

Dictionary machines with a small number of processors

Fisher, Allan L.
Journal:
ACM SIGARCH Computer Architecture News
Year:
1984
Language:
english
File:
PDF, 695 KB
english, 1984
10

Experimental evaluation of on-chip microprocessor cache memories

Hill, Mark D., Smith, Alan Jay
Journal:
ACM SIGARCH Computer Architecture News
Year:
1984
Language:
english
File:
PDF, 922 KB
english, 1984
11

The use of static column ram as a memory hierarchy

Goodman, James R., Chiang, Men-chow
Journal:
ACM SIGARCH Computer Architecture News
Year:
1984
Language:
english
File:
PDF, 869 KB
english, 1984
12

The design of an object oriented architecture

Ishikawa, Yutaka, TOKORO, Mario
Journal:
ACM SIGARCH Computer Architecture News
Year:
1984
Language:
english
File:
PDF, 1018 KB
english, 1984
14

Data broadcasting in linearly scheduled array processors

Fortes, J. A. B., Moldovan, D. I.
Journal:
ACM SIGARCH Computer Architecture News
Year:
1984
Language:
english
File:
PDF, 735 KB
english, 1984
15

Unidirectional error correction/detection for VLSI memory

Bose, Bella
Journal:
ACM SIGARCH Computer Architecture News
Year:
1984
Language:
english
File:
PDF, 302 KB
english, 1984
17

On the performance of loosely coupled multiprocessors

Bhuyan, Laxmi N.
Journal:
ACM SIGARCH Computer Architecture News
Year:
1984
Language:
english
File:
PDF, 581 KB
english, 1984
18

Message repository definitional facility

Kavi, Krishna M., Banios, Edward W., Shriver, Bruce D.
Journal:
ACM SIGARCH Computer Architecture News
Year:
1984
Language:
english
File:
PDF, 648 KB
english, 1984
19

Fault-secure algorithms for multiple-processor systems

Banerjee, Prithviraj, Abraham, Jacob A.
Journal:
ACM SIGARCH Computer Architecture News
Year:
1984
Language:
english
File:
PDF, 825 KB
english, 1984
22

Dynamic decentralized cache schemes for mimd parallel processors

Rudolph, Larry, Segall, Zary
Journal:
ACM SIGARCH Computer Architecture News
Year:
1984
Language:
english
File:
PDF, 795 KB
english, 1984
23

Cache hit ratios with geometric task switch intervals

Haikala, Ilkka J.
Journal:
ACM SIGARCH Computer Architecture News
Year:
1984
Language:
english
File:
PDF, 568 KB
english, 1984
25

Architecture of SOAR

Ungar, David, Blau, Ricki, Foley, Peter, Samples, Dain, Patterson, David
Journal:
ACM SIGARCH Computer Architecture News
Year:
1984
Language:
english
File:
PDF, 1.38 MB
english, 1984
26

A Characterization of Processor Performance in the vax-11/780

Emer, Joel S., Clark, Douglas W.
Journal:
ACM SIGARCH Computer Architecture News
Year:
1984
Language:
english
File:
PDF, 957 KB
english, 1984
27

An economical solution to the cache coherence problem

Archibald, James, Baer, Jean Loup
Journal:
ACM SIGARCH Computer Architecture News
Year:
1984
Language:
english
File:
PDF, 712 KB
english, 1984
28

Execution of logic programs on a dataflow architecture

Bic, Lubomir
Journal:
ACM SIGARCH Computer Architecture News
Year:
1984
Language:
english
File:
PDF, 609 KB
english, 1984
29

The peripheral processor pp4, a highly regular VLSI processor

Moeller, W. D., Sandweg, G.
Journal:
ACM SIGARCH Computer Architecture News
Year:
1984
Language:
english
File:
PDF, 953 KB
english, 1984
31

Modular matrix multiplication on a linear array

Ramakrishnan, I. V., Varman, P. J.
Journal:
ACM SIGARCH Computer Architecture News
Year:
1984
Language:
english
File:
PDF, 544 KB
english, 1984
32

The pringle parallel computer

Kapauan, Alejandro, Field, J. Timothy, Gannon, Dennis B., Snyder, Lawrence
Journal:
ACM SIGARCH Computer Architecture News
Year:
1984
Language:
english
File:
PDF, 654 KB
english, 1984
33

Scheduling of tasks for distributed processors

Mehrotra, Ravi, Talukdar, Sarosh N.
Journal:
ACM SIGARCH Computer Architecture News
Year:
1984
Language:
english
File:
PDF, 687 KB
english, 1984
36

Joint encryption and error correction schemes

Rao, T. R. N.
Journal:
ACM SIGARCH Computer Architecture News
Year:
1984
Language:
english
File:
PDF, 159 KB
english, 1984
37

A high performance factoring machine

Rudd, W G, Buell, Duncan A, Chiarulli, Donald M
Journal:
ACM SIGARCH Computer Architecture News
Year:
1984
Language:
english
File:
PDF, 309 KB
english, 1984
38

The importance of being square

Kruskal, Clyde P., Snir, Marc
Journal:
ACM SIGARCH Computer Architecture News
Year:
1984
Language:
english
File:
PDF, 647 KB
english, 1984
39

Connection principles for multipath, packet switching networks

Chin, Chi-Yuan, Hwang, Kai
Journal:
ACM SIGARCH Computer Architecture News
Year:
1984
Language:
english
File:
PDF, 959 KB
english, 1984
41

Error-correcting codes for semiconductor memories

Chen, C. L.
Journal:
ACM SIGARCH Computer Architecture News
Year:
1984
Language:
english
File:
PDF, 237 KB
english, 1984