Volume 149; Issue 4

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IEE Proceedings - Circuits Devices and Systems
Volume 149; Issue 4

IEE Proceedings - Circuits Devices and Systems

Volume 149; Issue 4

1

Filtering current mirror

Journal:

IEE Proceedings - Circuits Devices and Systems

Year:

2002

Language:

english

File:

PDF, 171 KB

english, 2002

2

Exact analytical model for the AEP of control signals

Journal:

IEE Proceedings - Circuits Devices and Systems

Year:

2002

Language:

english

File:

PDF, 337 KB

english, 2002

3

Low power receiver architectures for multi-carrier CDMA

McCormick, A.C., Grant, P.M., Thompson, J.S., Arslan, T., Erdogan, A.T.

Journal:

IEE Proceedings - Circuits Devices and Systems

Year:

2002

Language:

english

File:

PDF, 426 KB

english, 2002

4

Extraction of extended BSIM3v3.2.2 model card of vertical 130 nm Si p-MOSFET for circuit simulation

Korbel, A., Schulz, T., Mecking, S., Langmann, U.

Journal:

IEE Proceedings - Circuits Devices and Systems

Year:

2002

Language:

english

File:

PDF, 461 KB

english, 2002

5

New physically-based PiN diode compact model for circuit modelling applications

Igic, P.M., Mawby, P.A., Towers, M.S., Batcup, S.

Journal:

IEE Proceedings - Circuits Devices and Systems

Year:

2002

Language:

english

File:

PDF, 449 KB

english, 2002

6

Fast and efficient algorithm for the multiplierless realisation of linear DSP transforms

Yurdakul, A., Dundar, G.

Journal:

IEE Proceedings - Circuits Devices and Systems

Year:

2002

Language:

english

File:

PDF, 437 KB

english, 2002

7

Estimation of bit-level transition activity in data-paths based on word-level statistics and conditional entropy

Kyriakis-Bitzaros, E.D., Nikolaidis, S.

Journal:

IEE Proceedings - Circuits Devices and Systems

Year:

2002

Language:

english

File:

PDF, 442 KB

english, 2002

8

Schmitt trigger oscillator and its synchronisation by an external square oscillator

Cornmercon, J.-C., Badard, R.

Journal:

IEE Proceedings - Circuits Devices and Systems

Year:

2002

Language:

english

File:

PDF, 368 KB

english, 2002

9

Module placement with boundary constraints using B*-trees

Lin, J.-M., Yi, H.-E., Chang, Y.-W.

Journal:

IEE Proceedings - Circuits Devices and Systems

Year:

2002

Language:

english

File:

PDF, 454 KB

english, 2002

10

VLSI methodology for the design of RNS and QRNS full adder based converters

Soudris, D.J., Dasygenis, M.M., Thanailakis, A.T.

Journal:

IEE Proceedings - Circuits Devices and Systems

Year:

2002

Language:

english

File:

PDF, 661 KB

english, 2002