IEEE Journal of Solid-State Circuits

1

A New Transceiver Architecture for the 60-GHz Band

Parsa, A., Razavi, B.

Journal:

Year:

2009

Language:

english

File:

PDF, 1.37 MB

english, 2009

2

Design of Power-Rail ESD Clamp Circuit With Ultra-Low Standby Leakage Current in Nanoscale CMOS Technology

Chang-Tzu Wang, Ming-Dou Ker

Journal:

IEEE Journal of Solid-State Circuits

Year:

2009

Language:

english

File:

PDF, 1.22 MB

english, 2009

3

A 125–1250 MHz Process-Independent Adaptive Bandwidth Spread Spectrum Clock Generator With Digital Controlled Self-Calibration

Ebuchi, T., Komatsu, Y., Okamoto, T., Arima, Y., Yamada, Y., Sogawa, K., Okamoto, K., Morie, T., Hirata, T., Dosho, S., Yoshikawa, T.

Journal:

IEEE Journal of Solid-State Circuits

Year:

2009

Language:

english

File:

PDF, 3.33 MB

english, 2009

4

A Wideband CMOS Low Noise Amplifier Employing Noise and IM2 Distortion Cancellation for a Digital TV Tuner

Donggu Im, Ilku Nam, Hong-Teuk Kim, Kwyro Lee

Journal:

IEEE Journal of Solid-State Circuits

Year:

2009

Language:

english

File:

PDF, 960 KB

english, 2009

5

A 10-bit 50 MS/s Pipelined ADC With Capacitor-Sharing and Variable- Opamp

Byung-Geun Lee, Tsang, R.M.

Journal:

IEEE Journal of Solid-State Circuits

Year:

2009

Language:

english

File:

PDF, 697 KB

english, 2009

6

A 32 mW 1.25 GS/s 6b 2b/Step SAR ADC in 0.13m CMOS

Zhiheng Cao, Shouli Yan, Yunchu Li

Journal:

IEEE Journal of Solid-State Circuits

Year:

2009

Language:

english

File:

PDF, 2.04 MB

english, 2009

7

A 1.2 GSample/s Double-Switching CMOS THA With 62 dB THD

Dinc, H., Allen, P.E.

Journal:

IEEE Journal of Solid-State Circuits

Year:

2009

Language:

english

File:

PDF, 3.19 MB

english, 2009

8

Multi-Standard Mobile Broadcast Receiver LNA With Integrated Selectivity and Novel Wideband Impedance Matching Technique

Tae Wook Kim, Muthali, H., Sengupta, S., Barnett, K., Jaffee, J.

Journal:

IEEE Journal of Solid-State Circuits

Year:

2009

Language:

english

File:

PDF, 1.18 MB

english, 2009

9

A Biomimetic, 4.5 W, 120+ dB, Log-Domain Cochlea Channel With AGC

Katsiamis, A.G., Drakakis, E.M., Lyon, R.F.

Journal:

IEEE Journal of Solid-State Circuits

Year:

2009

Language:

english

File:

PDF, 1.25 MB

english, 2009

10

An LC-Based Clock Buffer With Tunable Injection Locking

Li-Min Lee, Yang, C.-K.K.

Journal:

IEEE Journal of Solid-State Circuits

Year:

2009

Language:

english

File:

PDF, 1.37 MB

english, 2009

11

Analysis and Design of a CMOS Phase-Tunable Injection-Coupled LC Quadrature VCO (PTIC-QVCO)

Chamas, I.R., Raman, S.

Journal:

IEEE Journal of Solid-State Circuits

Year:

2009

Language:

english

File:

PDF, 777 KB

english, 2009

12

A 33.6-to-33.8 Gb/s Burst-Mode CDR in 90 nm CMOS Technology

Lan-Chou Cho, Chihun Lee, Chao-Ching Hung, Shen-Iuan Liu

Journal:

IEEE Journal of Solid-State Circuits

Year:

2009

Language:

english

File:

PDF, 1.17 MB

english, 2009

13

A 60 kb/s–10 Mb/s Adaptive Frequency Hopping Transceiver for Interference-Resilient Body Channel Communication

Namjun Cho, Long Yan, Joonsung Bae, Hoi-Jun Yoo

Journal:

IEEE Journal of Solid-State Circuits

Year:

2009

Language:

english

File:

PDF, 2.34 MB

english, 2009

14

A 0.8 V, 2.6 mW, 88 dB Dual-Channel Audio Delta-Sigma D/A Converter With Headphone Driver

Kyehyung Lee, Qingdong Meng, Sugimoto, T., Hamashita, K., Takasuka, K., Takeuchi, S., Un-Ku Moon, Temes, G.C.

Journal:

IEEE Journal of Solid-State Circuits

Year:

2009

Language:

english

File:

PDF, 1.66 MB

english, 2009

15

A 3 GHz Fractional All-Digital PLL With a 1.8 MHz Bandwidth Implementing Spur Reduction Techniques

Temporiti, E., Weltin-Wu, C., Baldi, D., Tonietto, R., Svelto, F.

Journal:

IEEE Journal of Solid-State Circuits

Year:

2009

Language:

english

File:

PDF, 1.93 MB

english, 2009

16

Laser Radar Receiver Channel With Timing Detector Based on Front End Unipolar-to-Bipolar Pulse Shaping

Kurtti, S., Kostamovaara, J.

Journal:

IEEE Journal of Solid-State Circuits

Year:

2009

Language:

english

File:

PDF, 1.42 MB

english, 2009

17

A High-Speed Inductive-Coupling Link With Burst Transmission

Miura, N., Kohama, Y., Sugimori, Y., Ishikuro, H., Sakurai, T., Kuroda, T.

Journal:

IEEE Journal of Solid-State Circuits

Year:

2009

Language:

english

File:

PDF, 1.38 MB

english, 2009

18

A 1.2 V 114 mW Dual-Band Direct-Conversion DVB-H Tuner in 0.13 m CMOS

Ming-Ching Kuo, Shiau-Wen Kao, Chih-Hung Chen, Tsung-Shuen Hung, Yi-Shing Shih, Tzu-Yi Yang, Chien-Nan Kuo

Journal:

IEEE Journal of Solid-State Circuits

Year:

2009

Language:

english

File:

PDF, 2.60 MB

english, 2009

19

A 2.7 mW, 90.3 dB DR Continuous-Time Quadrature Bandpass Sigma-Delta Modulator for GSM/EDGE Low-IF Receiver in 0.25 m CMOS

Song-Bok Kim, Joeres, S., Wunderlich, R., Heinen, S.

Journal:

IEEE Journal of Solid-State Circuits

Year:

2009

Language:

english

File:

PDF, 1.39 MB

english, 2009

20

Output Impedance Shaping for Frequency Compensation of MOS Audio Power Amplifiers

van der Zee, R., Mostert, F.

Journal:

IEEE Journal of Solid-State Circuits

Year:

2009

Language:

english

File:

PDF, 859 KB

english, 2009

21

A 2.2 mW 1.75 GS/s 5 Bit Folding Flash ADC in 90 nm Digital CMOS

Verbruggen, B., Craninckx, J., Kuijk, M., Wambacq, P., Van der Plas, G.

Journal:

IEEE Journal of Solid-State Circuits

Year:

2009

Language:

english

File:

PDF, 1.28 MB

english, 2009

22

A Single–Chip 10-Band WCDMA/HSDPA 4-Band GSM/EDGE SAW-less CMOS Receiver With DigRF 3G Interface and 90 dBm IIP2

Kaczman, D., Shah, M., Alam, M., Rachedine, M., Cashen, D., Lu Han, Raghavan, A.

Journal:

IEEE Journal of Solid-State Circuits

Year:

2009

Language:

english

File:

PDF, 2.02 MB

english, 2009

23

A Process Variation Tolerant Embedded Split-Gate Flash Memory Using Pre-Stable Current Sensing Scheme

Meng-Fan Chang, Shin-Jang Shen

Journal:

IEEE Journal of Solid-State Circuits

Year:

2009

Language:

english

File:

PDF, 1.61 MB

english, 2009

24

Low-Power Race-Free Programmable Logic Arrays

Samson, G., Clark, L.T.

Journal:

IEEE Journal of Solid-State Circuits

Year:

2009

Language:

english

File:

PDF, 2.25 MB

english, 2009

25

A 4.8 GS/s 5-bit ADC-Based Receiver With Embedded DFE for Signal Equalization

Varzaghani, A., Yang, C.-K.K.

Journal:

IEEE Journal of Solid-State Circuits

Year:

2009

Language:

english

File:

PDF, 1.61 MB

english, 2009

26

Synchronous Ultra-High-Density 2RW Dual-Port 8T-SRAM With Circumvention of Simultaneous Common-Row-Access

Nii, K., Tsukamoto, Y., Yabuuchi, M., Masuda, Y., Imaoka, S., Usui, K., Ohbayashi, S., Makino, H., Shinohara, H.

Journal:

IEEE Journal of Solid-State Circuits

Year:

2009

Language:

english

File:

PDF, 2.73 MB

english, 2009

27

Design of Sub-90 nm Low-Power and Variation Tolerant PD/SOI SRAM Cell Based on Dynamic Stability Metrics

Joshi, R.V., Mukhopadhyay, S., Plass, D.W., Chan, Y.H., Ching-Te Chuang, Yue Tan

Journal:

IEEE Journal of Solid-State Circuits

Year:

2009

Language:

english

File:

PDF, 2.11 MB

english, 2009

28

Distributed Waveform Generator: A New Circuit Technique for Ultra-Wideband Pulse Generation, Shaping and Modulation

Yunliang Zhu, Zuegel, J.D., Marciante, J.R., Hui Wu

Journal:

IEEE Journal of Solid-State Circuits

Year:

2009

Language:

english

File:

PDF, 2.27 MB

english, 2009

29