Volume 13; Issue 4

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IEEE Transactions on Computer-Aided Design of Integrated...
Volume 13; Issue 4

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

Volume 13; Issue 4

1

Reverse short-channel effect due to lateral diffusion of point-defect induced by source/drain ion implantation

Kunikiyo, T., Mitsui, K., Fujinaga, M., Uchida, T., Kotani, N.

Journal:

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

Year:

1994

Language:

english

File:

PDF, 901 KB

english, 1994

2

Symbolic model checking for sequential circuit verification

Burch, J.R., Clarke, E.M., Long, D.E., McMillan, K.L., Dill, D.L.

Journal:

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

Year:

1994

Language:

english

File:

PDF, 2.62 MB

english, 1994

3

A scheduling algorithm for conditional resource sharing-a hierarchical reduction approach

Kim, T., Yonezawa, N., Liu, J.W.S., Liu, C.L.

Journal:

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

Year:

1994

Language:

english

File:

PDF, 1.32 MB

english, 1994

4

A transformation-based method for loop folding

Tsing-Fa Lee, Wu, A.C.-H., Youn-Long Lin, Gajski, D.D.

Journal:

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

Year:

1994

Language:

english

File:

PDF, 1.20 MB

english, 1994

5

Lower-bound performance estimation for the high-level synthesis scheduling problem

Rim, M., Jain, R.

Journal:

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

Year:

1994

Language:

english

File:

PDF, 785 KB

english, 1994

6

PBS: proven Boolean simplification

Aagaard, M., Leeser, M.

Journal:

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

Year:

1994

Language:

english

File:

PDF, 1.25 MB

english, 1994

7

A CAD procedure for optimizing bipolar devices relative to BiCMOS circuit delays

Desouki, A.S., Young-June Park, Hong-Shick Min

Journal:

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

Year:

1994

Language:

english

File:

PDF, 1.09 MB

english, 1994

8

Circuit-level electrothermal simulation of electrical overstress failures in advanced MOS I/O protection devices

Diaz, C.H., Sung-Mo Kang, Duvvury, C.

Journal:

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

Year:

1994

Language:

english

File:

PDF, 1.13 MB

english, 1994

9

An SOS MOSFET model based on calculation of the surface potential

Howes, R., Redman-White, W., Nichols, K.G., Mole, P.J., Robinson, M.J., Bird, S.

Journal:

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

Year:

1994

Language:

english

File:

PDF, 1.32 MB

english, 1994

10

On necessary and nonconflicting assignments in algorithmic test pattern generation

Cox, H., Rajski, J.

Journal:

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

Year:

1994

Language:

english

File:

PDF, 1.73 MB

english, 1994

11

Fault simulation for multiple faults by Boolean function manipulation

Takahashi, N., Ishiura, N., Yajima, S.

Journal:

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

Year:

1994

Language:

english

File:

PDF, 685 KB

english, 1994

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