IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

1

Guest Editorial

Alpert, C.J., Groeneveld, P.

Journal:

Year:

2004

Language:

english

File:

PDF, 55 KB

english, 2004

2

Corrections to “Physically Rigorous Modeling of Internal Laser-Probing Techniques for Microstructured Semiconductor Devices”

Thalhammer, R., Wachutka, G.

Journal:

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

Year:

2004

Language:

english

File:

PDF, 91 KB

english, 2004

3

Repeater scaling and its impact on CAD

Saxena, P., Menezes, N., Cocchini, P., Kirkpatrick, D.A.

Journal:

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

Year:

2004

Language:

english

File:

PDF, 655 KB

english, 2004

4

Local unidirectional bias for cutsize-delay tradeoff in performance-driven bipartitioning

Kahng, A.B., Xu Xu

Journal:

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

Year:

2004

Language:

english

File:

PDF, 342 KB

english, 2004

5

Benchmarking for large-scale placement and beyond

Adya, S.N., Yildiz, M.C., Markov, I.L., Villarrubia, P.G., Parakh, P.N., Madden, P.H.

Journal:

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

Year:

2004

Language:

english

File:

PDF, 1.14 MB

english, 2004

6

Crosstalk noise control in an SoC physical design flow

Becer, M., Vaidyanathan, R., Oh, C., Panda, R.

Journal:

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

Year:

2004

Language:

english

File:

PDF, 347 KB

english, 2004

7

Equivalent waveform propagation for static timing analysis

Hashimoto, M., Yamada, Y., Onodera, H.

Journal:

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

Year:

2004

Language:

english

File:

PDF, 673 KB

english, 2004

8

Closed-form expressions for extending step delay and slew metrics to ramp inputs for RC trees

Kashyap, C.V., Alpert, C.J., Liu, F., Devgan, A.

Journal:

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

Year:

2004

Language:

english

File:

PDF, 272 KB

english, 2004

9

Porosity-aware buffered Steiner tree construction

Alpert, C.J., Gandham, G., Hrkic, M., Jiang Hu, Quay, S.T., Sze, C.N.

Journal:

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

Year:

2004

Language:

english

File:

PDF, 773 KB

english, 2004

10

Fine granularity clustering-based placement

Bo Hu, Marek-Sadowska, M.

Journal:

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

Year:

2004

Language:

english

File:

PDF, 334 KB

english, 2004

11

Optimality and scalability study of existing placement algorithms

Chin-Chih Chang, Cong, J., Romesis, M., Min Xie

Journal:

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

Year:

2004

Language:

english

File:

PDF, 918 KB

english, 2004

12

Architecture and synthesis for on-chip multicycle communication

Cong, J., Yiping Fan, Guoling Han, Xun Yang, Zhiru Zhang

Journal:

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

Year:

2004

Language:

english

File:

PDF, 982 KB

english, 2004

13

Zero skew clock-tree optimization with buffer insertion/sizing and wire sizing

Jeng-Liang Tsai, Tsung-Hao Chen, Chen, C.C.-P.

Journal:

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

Year:

2004

Language:

english

File:

PDF, 512 KB

english, 2004

14