Volume 4; Issue 3

IEEE Transactions on Neural Networks

Volume 4; Issue 3

1

A generic systolic array building block for neural networks with on-chip learning

Lehmann, C., Viredaz, M., Blayo, F.

Journal:

IEEE Transactions on Neural Networks

Year:

1993

Language:

english

File:

PDF, 1.02 MB

english, 1993

2

A fuzzy inference engine in nonlinear analog mode and its application to a fuzzy logic control

Journal:

IEEE Transactions on Neural Networks

Year:

1993

Language:

english

File:

PDF, 2.22 MB

english, 1993

3

The pRAM: an adaptive VLSI chip

Clarkson, T.G., Ng, C.K., Guan, Y.

Journal:

IEEE Transactions on Neural Networks

Year:

1993

Language:

english

File:

PDF, 613 KB

english, 1993

4

A charge-based on-chip adaptation Kohonen neural network

He, Y., Cilingirogu, U.

Journal:

IEEE Transactions on Neural Networks

Year:

1993

Language:

english

File:

PDF, 723 KB

english, 1993

5

A CMOS analog adaptive BAM with on-chip learning and weight refreshing

Linares-Barranco, B., Sanchez-Sinencio, E., Rodriguez-Vazquez, A., Huertas, J.L.

Journal:

IEEE Transactions on Neural Networks

Year:

1993

Language:

english

File:

PDF, 999 KB

english, 1993

6

A single 1.5-V digital chip for a 10/sup 6/ synapse neural network

Watanabe, T., Kimura, K., Aoki, M., Sakata, T., Ito, K.

Journal:

IEEE Transactions on Neural Networks

Year:

1993

Language:

english

File:

PDF, 807 KB

english, 1993

7

Analog implementation of a Kohonen map with on-chip learning

Macq, D., Verleysen, M., Jespers, P., Legat, J.-D.

Journal:

IEEE Transactions on Neural Networks

Year:

1993

Language:

english

File:

PDF, 638 KB

english, 1993

8

An adaptive neural processing node

Donald, J., Akers, L.

Journal:

IEEE Transactions on Neural Networks

Year:

1993

Language:

english

File:

PDF, 1.11 MB

english, 1993

9

Silicon retina with correlation-based, velocity-tuned pixels

Journal:

IEEE Transactions on Neural Networks

Year:

1993

Language:

english

File:

PDF, 1.33 MB

english, 1993

10

A feedforward artificial neural network based on quantum effect vector-matrix multipliers

Levy, H.J., McGill, T.C.

Journal:

IEEE Transactions on Neural Networks

Year:

1993

Language:

english

File:

PDF, 728 KB

english, 1993

11

The design of a neuro-microprocessor

Wawrzynek, J., Asanovic, K., Morgan, N.

Journal:

IEEE Transactions on Neural Networks

Year:

1993

Language:

english

File:

PDF, 736 KB

english, 1993

12

UV-activated conductances allow for multiple time scale learning

Benson, R.G., Kerns, D.A.

Journal:

IEEE Transactions on Neural Networks

Year:

1993

Language:

english

File:

PDF, 677 KB

english, 1993

13

A multilevel neural network for A/D conversion

Yuh, J.-D., Newcomb, R.W.

Journal:

IEEE Transactions on Neural Networks

Year:

1993

Language:

english

File:

PDF, 1.10 MB

english, 1993

14

An analog CMOS chip set for neural networks with arbitrary topologies

Lansner, J.A., Lehmann, T.

Journal:

IEEE Transactions on Neural Networks

Year:

1993

Language:

english

File:

PDF, 408 KB

english, 1993

15

Silicon auditory processors as computer peripherals

Lazzaro, J., Wawrzynek, J., Mahowald, M., Sivilotti, M., Gillespie, D.

Journal:

IEEE Transactions on Neural Networks

Year:

1993

Language:

english

File:

PDF, 595 KB

english, 1993

16

A programmable analog VLSI neural network processor for communication receivers

Choi, J., Bang, S.H., Sheu, B.J.

Journal:

IEEE Transactions on Neural Networks

Year:

1993

Language:

english

File:

PDF, 1.53 MB

english, 1993