Volume 12; Issue 1

IEICE Electronics Express

Volume 12; Issue 1
1

An optimized architecture for modulo (2n − 2p + 1) multipliers

Year:
2015
Language:
english
File:
PDF, 697 KB
english, 2015
4

From Editor-in-Chief

Year:
2015
Language:
english
File:
PDF, 2.62 MB
english, 2015