Volume 26; Issue 1-2

Integration, the VLSI Journal

Volume 26; Issue 1-2
1

Testing with decision diagrams

Year:
1998
Language:
english
File:
PDF, 280 KB
english, 1998
2

Delay fault models for VLSI circuits

Year:
1998
Language:
english
File:
PDF, 218 KB
english, 1998
3

BIST for systems-on-a-chip

Year:
1998
Language:
english
File:
PDF, 740 KB
english, 1998
4

High-level test synthesis: a survey

Year:
1998
Language:
english
File:
PDF, 310 KB
english, 1998
5

FTROM: A Silicon Compiler for Fault-tolerant ROMs

Year:
1998
Language:
english
File:
PDF, 829 KB
english, 1998
6

Design of mixed-signal systems for testability

Year:
1998
Language:
english
File:
PDF, 131 KB
english, 1998
7

On-line testing for VLSI: state of the art and trends

Year:
1998
Language:
english
File:
PDF, 127 KB
english, 1998
8

A new approach in feature interaction testing

Year:
1998
Language:
english
File:
PDF, 252 KB
english, 1998
9

Editorial

Year:
1998
Language:
english
File:
PDF, 50 KB
english, 1998
10

Sequential test generators: past, present and future

Year:
1998
Language:
english
File:
PDF, 165 KB
english, 1998
11

An approach to test synthesis from higher level

Year:
1998
Language:
english
File:
PDF, 225 KB
english, 1998
12

Mixed-signal on-chip timing measurements

Year:
1998
Language:
english
File:
PDF, 204 KB
english, 1998
13

IDDQ testing: state of the art and future trends

Year:
1998
Language:
english
File:
PDF, 770 KB
english, 1998