Volume 45; Issue 1

Integration, the VLSI Journal

Volume 45; Issue 1

1

Fully hardware based WFQ architecture for high-speed QoS packet scheduling

Kieran McLaughlin, Dwayne Burns, Ciaran Toal, Colm McKillen, Sakir Sezer

Journal:

Integration, the VLSI Journal

Year:

2012

Language:

english

File:

PDF, 659 KB

english, 2012

2

A new scheme of test data compression based on equal-run-length coding (ERLC)

Wenfa Zhan, Aiman El-Maleh

Journal:

Integration, the VLSI Journal

Year:

2012

Language:

english

File:

PDF, 341 KB

english, 2012

3

Discharge-path-based antenna effect detection and fixing for X-architecture clock tree

Chia-Chun Tsai, Chung-Chieh Kuo, Feng-Tzu Hsu, Trong-Yen Lee

Journal:

Integration, the VLSI Journal

Year:

2012

Language:

english

File:

PDF, 2.92 MB

english, 2012

4

A 32 GBit/s communication SoC for a waferscale neuromorphic system

Stefan Scholze, Holger Eisenreich, Sebastian Höppner, Georg Ellguth, Stephan Henker, Mario Ander, Stefan Hänzsche, Johannes Partzsch, Christian Mayr, René Schüffny

Journal:

Integration, the VLSI Journal

Year:

2012

Language:

english

File:

PDF, 3.02 MB

english, 2012

5

Towards accelerating irregular EDA applications with GPUs

Hao Qian, Yangdong Deng, Bo Wang, Shuai Mu

Journal:

Integration, the VLSI Journal

Year:

2012

Language:

english

File:

PDF, 1.50 MB

english, 2012

6

Statistical DOE–ILP based power–performance–process (P3) optimization of nano-CMOS SRAM

Saraju P. Mohanty, Jawar Singh, Elias Kougianos, Dhiraj K. Pradhan

Journal:

Integration, the VLSI Journal

Year:

2012

Language:

english

File:

PDF, 1.14 MB

english, 2012

7

Robust low leakage controlled keeper by current-comparison domino for wide fan-in gates

Ali Peiravi, Mohammad Asyaei

Journal:

Integration, the VLSI Journal

Year:

2012

Language:

english

File:

PDF, 747 KB

english, 2012

8

Design of multi-mode application-specific cores based on high-level synthesis

Emmanuel Casseau, Bertrand Le Gal

Journal:

Integration, the VLSI Journal

Year:

2012

Language:

english

File:

PDF, 780 KB

english, 2012

9

VLSI design of memory-efficient, high-speed baseline MQ coder for JPEG 2000

Kishor Sarawadekar, Swapna Banerjee

Journal:

Integration, the VLSI Journal

Year:

2012

Language:

english

File:

PDF, 558 KB

english, 2012