Volume 46; Issue 2

Integration, the VLSI Journal

Volume 46; Issue 2

1

Use of FPGA or GPU-based architectures for remotely sensed hyperspectral image processing

González, Carlos, Sánchez, Sergio, Paz, Abel, Resano, Javier, Mozos, Daniel, Plaza, Antonio

Journal:

Integration, the VLSI Journal

Year:

2013

Language:

english

File:

PDF, 2.85 MB

english, 2013

2

Bitmask aware compression of NISC control words

Basu, Kanad, Murthy, Chetan, Mishra, Prabhat

Journal:

Integration, the VLSI Journal

Year:

2013

Language:

english

File:

PDF, 1010 KB

english, 2013

3

Low complexity bit-parallel polynomial basis multipliers over binary fields for special irreducible pentanomials

Imaña, José L., Hermida, Román, Tirado, Francisco

Journal:

Integration, the VLSI Journal

Year:

2013

Language:

english

File:

PDF, 759 KB

english, 2013

4

Fast transient current-steering CMOS LDO regulator based on current feedback amplifier

Saberkari, Alireza, Alarcón, Eduard, Shokouhi, Shahriar B.

Journal:

Integration, the VLSI Journal

Year:

2013

Language:

english

File:

PDF, 1.03 MB

english, 2013

5

Exploring redundant arithmetics in computer-aided design of arithmetic datapaths

Belloeil-Dupuis, Sophie, Chotin-Avot, Roselyne, Mehrez, Habib

Journal:

Integration, the VLSI Journal

Year:

2013

Language:

english

File:

PDF, 751 KB

english, 2013

6

Synthesis and optimization of multiple-valued combinational and sequential reversible circuits with don't cares

Niknafs, Aliakbar, Mohammadi, Majid

Journal:

Integration, the VLSI Journal

Year:

2013

Language:

english

File:

PDF, 678 KB

english, 2013

7

Post-routing layer assignment for double patterning with timing critical paths consideration

Sun, Jian, Lu, Yinghai, Zhou, Hai, Yan, Changhao, Zeng, Xuan

Journal:

Integration, the VLSI Journal

Year:

2013

Language:

english

File:

PDF, 1.28 MB

english, 2013

8

Hierarchical sizing and biasing of analog firm intellectual properties

Iskander, Ramy, Louërat, Marie-Minerve, Kaiser, Andreas

Journal:

Integration, the VLSI Journal

Year:

2013

Language:

english

File:

PDF, 2.24 MB

english, 2013

9

Multi-bend bus-driven floorplanning considering fixed-outline constraints

Sheng, Wenxu, Dong, Sheqin

Journal:

Integration, the VLSI Journal

Year:

2013

Language:

english

File:

PDF, 796 KB

english, 2013

10

A fragmentation aware High-Level Synthesis flow for low power heterogenous datapaths

Del Barrio, Alberto A., Memik, Seda Ogrenci, Molina, María C., Mendías, José M., Hermida, Román

Journal:

Integration, the VLSI Journal

Year:

2013

Language:

english

File:

PDF, 1.17 MB

english, 2013

11

Low-power and high-speed design of a versatile bit-serial multiplier in finite fields GF(2m)

Zakerolhosseini, Ali, Nikooghadam, Morteza

Journal:

Integration, the VLSI Journal

Year:

2013

Language:

english

File:

PDF, 567 KB

english, 2013

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