Jagadesh Kumar, M.: search on Z-Library

The world's largest scientific articles store. 70,000,000+ articles for free.

Don't use scam websites

51

A new symmetrical double gate nanoscale MOSFET with asymmetrical side gates for electrically induced source/drain

Ali A. Orouji, M. Jagadesh Kumar

Journal:

Microelectronic Engineering

Year:

2006

Language:

english

File:

PDF, 216 KB

english, 2006

52

Investigation of the novel attributes of a single-halo double gate SOI MOSFET: 2D simulation study

G.Venkateshwar Reddy, M.Jagadesh Kumar

Journal:

Microelectronics Journal

Year:

2004

Language:

english

File:

PDF, 230 KB

english, 2004

53

Investigation of a new modified source/drain for diminished self-heating effects in nanoscale MOSFETs using computer simulation

M. Jagadesh Kumar, Ali A. Orouji

Journal:

Physica E: Low-dimensional Systems and Nanostructures

Year:

2006

Language:

english

File:

PDF, 286 KB

english, 2006

54

Recessed source concept in nanoscale vertical surrounding gate (VSG) MOSFETs for controlling short-channel effects

B. Subrahmanyam, M. Jagadesh Kumar

Journal:

Physica E: Low-dimensional Systems and Nanostructures

Year:

2009

Language:

english

File:

PDF, 889 KB

english, 2009

55

Effect of the Ge mole fraction on the formation of a conduction path in cylindrical strained-silicon-on-SiGe MOSFETs

Tarun Vir Singh, M. Jagadesh Kumar

Journal:

Superlattices and Microstructures

Year:

2008

Language:

english

File:

PDF, 559 KB

english, 2008

56

Cjc and the output conductance of advanced bipolar junction transistors under nonlocal impact ionization conditions

Krishanu Datta, M Jagadesh Kumar

Journal:

Solid-State Electronics

Year:

1996

Language:

english

File:

PDF, 273 KB

english, 1996

57

On the dominant recombination level of platinum in silicon

M. Jagadesh Kumar, C. R. Selvakumar, V. Ramamurthy, K. N. Bhat

Journal:

physica status solidi (a)

Year:

1985

Language:

english

File:

PDF, 277 KB

english, 1985

58

Distal femoral tumours treated by resection and custom mega-prosthetic replacement

Mayil Vahanan Natarajan, A. Sivaseelam, S. Ayyappan, Jagadesh Chandra Bose, M. Sampath Kumar

Journal:

International Orthopaedics

Year:

2005

File:

PDF, 113 KB

2005

59

Comprehensive approach to modeling threshold voltage of

M. Jagadesh Kumar, Vivek Venkataraman, Susheel Nawal

Journal:

Journal of Computational Electronics

Year:

2007

Language:

english

File:

PDF, 347 KB

english, 2007

60

Evidence for suppressed short-channel effects in deep submicron dual-material gate (DMG) partially depleted SOI MOSFETs – A two-dimensional analytical approach

M. Jagadesh Kumar, G. Venkateshwar Reddy

Journal:

Microelectronic Engineering

Year:

2004

Language:

english

File:

PDF, 801 KB

english, 2004

61

Nanoscale SOI MOSFETs with electrically induced source/drain extension: Novel attributes and design considerations for suppressed short-channel effects

Ali A. Orouji, M. Jagadesh Kumar

Journal:

Superlattices and Microstructures

Year:

2006

Language:

english

File:

PDF, 937 KB

english, 2006

62

Novel Ge-profile design for high-speed SiGe HBTs: modelling and analysis

Patri, V.S., Jagadesh Kumar, M.

Journal:

IEE Proceedings - Circuits Devices and Systems

Year:

1999

Language:

english

File:

PDF, 404 KB

english, 1999

63

A simple hole scattering length model for the solution of charge transport in bipolar transistors

Datta, K., Jagadesh Kumar, M.

Journal:

IEEE Transactions on Electron Devices

Year:

1999

Language:

english

File:

PDF, 52 KB

english, 1999

64

On the iterative schemes to obtain base doping profiles for reducing base transit time in a bipolar transistor

Jagadesh Kumar, M., Patri, V.S.

Journal:

IEEE Transactions on Electron Devices

Year:

2001

Language:

english

File:

PDF, 56 KB

english, 2001

65

A new lateral PNM Schottky collector bipolar transistor (SCBT) on SOI for nonsaturating VLSI logic design

Jagadesh Kumar, M., Venkatesh Rao, D.

Journal:

IEEE Transactions on Electron Devices

Year:

2002

Language:

english

File:

PDF, 235 KB

english, 2002

66

A new low-loss lateral trench sidewall Schottky (LTSS) rectifier on SOI with high and sharp breakdown voltage

Jagadesh Kumar, M., Singh, Y.

Journal:

IEEE Transactions on Electron Devices

Year:

2002

Language:

english

File:

PDF, 260 KB

english, 2002

67

Compact Analytical Threshold-Voltage Model of Nanoscale Fully Depleted Strained-Si on Silicon–Germanium-on-Insu lator (SGOI) MOSFETs

Vivek Venkataraman, Susheel Nawal, M. Jagadesh Kumar

Journal:

IEEE Transactions on Electron Devices

Year:

2007

Language:

english

File:

PDF, 365 KB

english, 2007

68

The Ground Plane in Buried Oxide for Controlling Short-Channel Effects in Nanoscale SOI MOSFETs

Jagadesh Kumar, M., Siva, M.

Journal:

IEEE Transactions on Electron Devices

Year:

2008

Language:

english

File:

PDF, 346 KB

english, 2008

69

Impact of Strain on Drain Current and Threshold Voltage of Nanoscale Double Gate Tunnel Field Effect Transistor: Theoretical Investigation and Analysis

Saurabh, Sneh, Kumar, M. Jagadesh

Journal:

Japanese Journal of Applied Physics

Year:

2009

Language:

english

File:

PDF, 242 KB

english, 2009

70

Doping-Less Tunnel Field Effect Transistor: Design and Investigation

Kumar, M. Jagadesh, Janardhanan, Sindhu

Journal:

IEEE Transactions on Electron Devices

Year:

2013

Language:

english

File:

PDF, 981 KB

english, 2013

71

Dielectric-Modulated Impact-Ionization MOS Transistor as a Label-Free Biosensor

Kannan, N., Kumar, M. Jagadesh

Journal:

IEEE Electron Device Letters

Year:

2013

Language:

english

File:

PDF, 626 KB

english, 2013

72

Studies on the synthetic and structural aspects of benzosuberones bearing 2, 4-thiazolidenone moiety as potential anti-cancer agents

Nagarapu, Lingaiah, Yadagiri, Bandi, Bantu, Rajashaker, Kumar, C. Ganesh, Pombala, Sujitha, Nanubolu, Jagadesh

Journal:

European Journal of Medicinal Chemistry

Year:

2014

Language:

english

File:

PDF, 442 KB

english, 2014

73

Compact Analytical Model of Dual Material Gate Tunneling Field-Effect Transistor Using Interband Tunneling and Channel Transport

Vishnoi, Rajat, Kumar, M. Jagadesh

Journal:

IEEE Transactions on Electron Devices

Year:

2014

Language:

english

File:

PDF, 1.58 MB

english, 2014

74

Analytical drain current model for nanoscale strained‐Si/SiGe MOSFETs

Batwani, Himanshu, Gaur, Mayank, Jagadesh Kumar, M.

Journal:

COMPEL Int J for Computation and Maths in Electrical and Electronic Eng

Year:

2009

Language:

english

File:

PDF, 464 KB

english, 2009

75

[IEEE Comput. Soc . 17th International Conference on VLSI Design - Mumbai, India (5-9 Jan. 2004)] 17th International Conference on VLSI Design. Proceedings. - A new Surface Accumulation Layer Transistor (SALTran) concept for current gain enhancement in bipolar transistors

Jagadesh Kumar, M., Parihar, V.

Year:

2004

Language:

english

File:

PDF, 311 KB

english, 2004

76

[IEEE 2012 International Conference on Emerging Electronics (ICEE 2012) - Mumbai, India (2012.12.15-2012.12.17)] 2012 International Conference on Emerging Electronics - Controlled deposition of aligned carbon nanotubes by floating electrodes dielectrophoresis

Chaturvedi, Poornendu, Chouksey, Abhilasha, Naik, Anant, Kumar, Anand, Singh, Vajinder, Rawat, Jaswant Singh, Chaudhury, Partap K., Jagadesh Kumar, M.

Year:

2012

Language:

english

File:

PDF, 1.34 MB

english, 2012

77

Thin-Film Bipolar Transistors on Recrystallized Polycrystalline Silicon Without Impurity Doped Junctions: Proposal and Investigation

Nadda, Kanika, Kumar, M. Jagadesh

Journal:

Journal of Display Technology

Year:

2014

Language:

english

File:

PDF, 732 KB

english, 2014

78

Impact of gate leakage considerations in tunnel field effect transistor design

Chaturvedi, Poornendu, Kumar, M. Jagadesh

Journal:

Japanese Journal of Applied Physics

Year:

2014

Language:

english

File:

PDF, 2.41 MB

english, 2014

79

Junctionless Impact Ionization MOS: Proposal and Investigation

Ramaswamy, Sindhu, Kumar, Mamidala Jagadesh

Journal:

IEEE Transactions on Electron Devices

Year:

2014

Language:

english

File:

PDF, 1.22 MB

english, 2014

80

[IEEE 19th International Conference on VLSI Design held jointly with 5th International Conference on Embedded Systems Design (VLSID'06) - Hyderabad, India (2006.01.3-2006.01.7)] 19th International Conference on VLSI Design held jointly with 5th International Conference on Embedded Systems Design (VLSID'06) - Gate-induced barrier field effect transistor (GBFET) - a new thin film transistor for active matrix liquid crystal display systems

Jagadesh Kumar, M., Orouji, A.A.

Year:

2006

Language:

english

File:

PDF, 331 KB

english, 2006

81

Controlling the ON-resistance in SOI LDMOS using parasitic bipolar junction transistor

Bansal, Avikal, Kumar, M. Jagadesh

Journal:

Journal of Computational Electronics

Year:

2014

Language:

english

File:

PDF, 332 KB

english, 2014

82

2-D Analytical Model for the Threshold Voltage of a Tunneling FET With Localized Charges

Vishnoi, Rajat, Kumar, M. Jagadesh

Journal:

IEEE Transactions on Electron Devices

Year:

2014

Language:

english

File:

PDF, 1.24 MB

english, 2014

83

In-Built N+ Pocket p-n-p-n Tunnel Field-Effect Transistor

Abdi, Dawit Burusie, Kumar, Mamidala Jagadesh

Journal:

IEEE Electron Device Letters

Year:

2014

Language:

english

File:

PDF, 900 KB

english, 2014

84

[IEEE 2011 International Semiconductor Device Research Symposium (ISDRS) - College Park, MD, USA (2011.12.7-2011.12.9)] 2011 International Semiconductor Device Research Symposium (ISDRS) - A novel Doping-less Bipolar Transistor with Schottky Collector

Nadda, Kanika, Kumar, M. Jagadesh

Year:

2011

Language:

english

File:

PDF, 497 KB

english, 2011

85

Inverse modeling of delta doped pseudomorphic high electron mobility transistors

Mishra, Meena, Kumar, M. Jagadesh, Singh, Yashvir, Shukla, S. R., Vyas, H. P., Rawal, D. S., Naik, A., Sharma, H. S., Sehgal, B. K., Gulati, R.

Journal:

Journal of Vacuum Science & Technology A Vacuum Surfaces and Films

Year:

2004

Language:

english

File:

PDF, 311 KB

english, 2004

86

Schottky Collector Bipolar Transistor Without Impurity Doped Emitter and Base: Design and Performance

Nadda, Kanika, Kumar, M. Jagadesh

Journal:

IEEE Transactions on Electron Devices

Year:

2013

Language:

english

File:

PDF, 1.11 MB

english, 2013

87

An Accurate Compact Analytical Model for the Drain Current of a TFET From Subthreshold to Strong Inversion

Vishnoi, Rajat, Kumar, Mamidala Jagadesh

Journal:

IEEE Transactions on Electron Devices

Year:

2015

Language:

english

File:

PDF, 1.04 MB

english, 2015

88

Facing the Students on Facebook: Are You Game for It?

Kumar, Jagadesh

Journal:

IETE Technical Review

Year:

2014

Language:

english

File:

PDF, 134 KB

english, 2014

89

Vertical Bipolar Charge Plasma Transistor with Buried Metal Layer

Nadda, Kanika, Kumar, M. Jagadesh

Journal:

Scientific Reports

Year:

2015

Language:

english

File:

PDF, 984 KB

english, 2015

90

QUANTUM CONFINEMENT EFFECTS IN STRAINED SILICON MOSFETS

KUMAR, M. JAGADESH, SINGH, TARUN VIR

Journal:

International Journal of Nanoscience

Year:

2008

Language:

english

File:

PDF, 140 KB

english, 2008

91

A Compact Analytical Model for the Drain Current of Gate-All-Around Nanowire Tunnel FET Accurate From Sub-Threshold to ON-State

Vishnoi, Rajat, Kumar, Mamidala Jagadesh

Journal:

IEEE Transactions on Nanotechnology

Year:

2015

Language:

english

File:

PDF, 1.04 MB

english, 2015

92

Expanding the Boundaries of Your Research Using Social Media: Stand-Up and Be Counted

Kumar, M. Jagadesh

Journal:

IETE Technical Review

Year:

2014

Language:

english

File:

PDF, 116 KB

english, 2014

93

Telling Lies to Describe Truth: Do we Emphasize the Importance of “The Art of Approximations” to the Students?

Kumar, M. Jagadesh

Journal:

IETE Technical Review

Year:

2014

Language:

english

File:

PDF, 114 KB

english, 2014

94

The Pay or Perish Game: Why we should stand up against ‘active discrimination’ for the survival of net neutrality

Kumar, M. Jagadesh

Journal:

IETE Technical Review

Year:

2015

Language:

english

File:

PDF, 134 KB

english, 2015

95

Improving the breakdown voltage, ON-resistance and gate-charge of InGaAs LDMOS power transistors

Kumar, M Jagadesh, Bansal, Avikal

Journal:

Semiconductor Science and Technology

Year:

2012

Language:

english

File:

PDF, 456 KB

english, 2012

96

A pseudo 2-D surface potential model of a dual material double gate junctionless field effect transistor

Agrawal, Ashutosh Kumar, Koutilya, P. N. V. R., Jagadesh Kumar, M.

Journal:

Journal of Computational Electronics

Year:

2015

Language:

english

File:

PDF, 1.72 MB

english, 2015

97

Quantum Computing in India: An Opportunity that Should Not Be Missed

Kumar, M. Jagadesh

Journal:

IETE Technical Review

Year:

2014

Language:

english

File:

PDF, 117 KB

english, 2014

98

Schottky Biristor: A Metal-Semiconductor–Metal Bistable Resistor

Kumar, Mamidala Jagadesh, Maram, Maheedhar, Varma, P. Pradeep

Journal:

IEEE Transactions on Electron Devices

Year:

2015

Language:

english

File:

PDF, 1.22 MB

english, 2015

99

Global University Rankings: What should India do?

Kumar, M. Jagadesh

Journal:

IETE Technical Review

Year:

2015

Language:

english

File:

PDF, 112 KB

english, 2015

100

Acute sialadenitis of parotid gland: Anaesthesia mumps

Kumar, KoramutlaPradeep, Kumar, PKishore, Jagadesh, Gudaru

Journal:

Indian Journal of Anaesthesia

Year:

2014

Language:

english

File:

PDF, 637 KB

english, 2014