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51

Low-voltage CMOS subthreshold four-quadrant tripler

Shen-Iuan Liu, Po-ki Chen

Journal:

Analog Integrated Circuits and Signal Processing

Year:

1996

Language:

english

File:

PDF, 410 KB

english, 1996

52

Low-Voltage BiCMOS Four-Quadrant Multiplier and Squarer

Shen-Iuan Liu, Jiin-Long Lee, Cheng-Chieh Chang

Journal:

Analog Integrated Circuits and Signal Processing

Year:

1999

Language:

english

File:

PDF, 97 KB

english, 1999

53

Systematic Generation of Current-Mode Linear Transformation Filters Based on Multiple Output CCIIs

Yuh-Shyan Hwang, Pei-Tzu Hung, Wei Chen, Shen-Iuan Liu

Journal:

Analog Integrated Circuits and Signal Processing

Year:

2002

Language:

english

File:

PDF, 150 KB

english, 2002

54

Multi-bit Delta-Sigma Modulator Using a Modified DWA Algorithm

Chien-Hung Kuo, Tzu-Chien Hsueh, Shen-Iuan Liu

Journal:

Analog Integrated Circuits and Signal Processing

Year:

2002

Language:

english

File:

PDF, 224 KB

english, 2002

55

Decision Feedback Equalizers Using the Back-Gate Feedback Technique

Chang-Lin Hsieh, Shen-Iuan Liu

Journal:

IEEE Transactions on Circuits and Systems II: Express Briefs

Year:

2011

Language:

english

File:

PDF, 941 KB

english, 2011

56

[IEEE 2012 IEEE International Solid- State Circuits Conference - (ISSCC) - San Francisco, CA, USA (2012.02.19-2012.02.23)] 2012 IEEE International Solid-State Circuits Conference - A 2.4GHz sub-harmonically injection-locked PLL with self-calibrated injection timing

Huang, Yi-Chieh, Liu, Shen-Iuan

Year:

2012

Language:

english

File:

PDF, 280 KB

english, 2012

57

A Wide-Range PLL Using Self-Healing Prescaler/VCO in 65-nm CMOS

Lee, I-Ting, Tsai, Yun-Ta, Liu, Shen-Iuan

Journal:

IEEE Transactions on Very Large Scale Integration (VLSI) Systems

Year:

2013

Language:

english

File:

PDF, 2.19 MB

english, 2013

58

[IEEE 2005 IEEE Asian Solid-State Circuits Conference - Hsinchu, Taiwan (2005.11.1-2005.11.1)] 2005 IEEE Asian Solid-State Circuits Conference - A Dual-Phase Digital PWM Controller for DC-DC Switching Converters with Current Balancing

Liu, Tysh-bin, Huang, Wei-jen, Liu, Shen-iuan

Year:

2006

Language:

english

File:

PDF, 375 KB

english, 2006

59

A spur-reduction technique for a 5-GHz frequency synthesizer

Chun-Yi Kuo, Jung-Yu Chang, Shen-Iuan Liu

Journal:

IEEE Transactions on Circuits and Systems I: Regular Papers

Year:

2006

Language:

english

File:

PDF, 778 KB

english, 2006

60

A Digital Calibration Technique for Charge Pumps in Phase-Locked Systems

Che-Fu Liang, Shin-Hua Chen, Shen-Iuan Liu

Journal:

IEEE Journal of Solid-State Circuits

Year:

2008

Language:

english

File:

PDF, 1.43 MB

english, 2008

61

Dual-input differentiators and integrators with tunable time constants using current conveyors

Shen-Iuan Liu, Yuh-Shyan Hwang

Journal:

IEEE Transactions on Instrumentation and Measurement

Year:

1994

Language:

english

File:

PDF, 431 KB

english, 1994

62

New current-feedback amplifier-based universal biquadratic filter

Shen-Iuan Liu, Dong-Shiuh Wu

Journal:

IEEE Transactions on Instrumentation and Measurement

Year:

1995

Language:

english

File:

PDF, 181 KB

english, 1995

63

The single CCII biquads with high-input impedance

Shen-Iuan Liu, Hen-Wai Tsao

Journal:

IEEE Transactions on Circuits and Systems

Year:

1991

Language:

english

File:

PDF, 412 KB

english, 1991

64

A 40-GHz Fast-Locked All-Digital Phase-Locked Loop Using a Modified Bang-Bang Algorithm

Chao-Ching Hung, Shen-Iuan Liu

Journal:

IEEE Transactions on Circuits and Systems II: Express Briefs

Year:

2011

Language:

english

File:

PDF, 604 KB

english, 2011

65

A Noise Filtering Technique for Fractional- Frequency Synthesizers

Chao-Ching Hung, Shen-Iuan Liu

Journal:

IEEE Transactions on Circuits and Systems II: Express Briefs

Year:

2011

Language:

english

File:

PDF, 490 KB

english, 2011

66

An All-Digital Jitter Tolerance Measurement Technique for CDR Circuits

Yi-Chieh Huang, Ping-Ying Wang, Shen-Iuan Liu

Journal:

IEEE Transactions on Circuits and Systems II: Express Briefs

Year:

2012

Language:

english

File:

PDF, 893 KB

english, 2012

67

A 10-MS/s-to-100-kS/s Power-Scalable Fully Differential CBSC 10-Bit Pipelined ADC With Adaptive Biasing

Mu-Chen Huang, Shen-Iuan Liu

Journal:

IEEE Transactions on Circuits and Systems II: Express Briefs

Year:

2010

Language:

english

File:

PDF, 659 KB

english, 2010

68

Analogue BiCMOS squarer and its applications

Chang, Cheng-Chieh, Liu, Shen-Iuan, Lee, Jim-Long

Journal:

Electronics Letters

Year:

1999

Language:

english

File:

PDF, 352 KB

english, 1999

69

A 6-GHz All-Digital Fractional- Frequency Synthesizer Using FIR-Embedded Noise Filtering Technique

I-Ting Lee, Hung-Yu Lu, Shen-Iuan Liu

Journal:

IEEE Transactions on Circuits and Systems II: Express Briefs

Year:

2012

Language:

english

File:

PDF, 490 KB

english, 2012

70

A 1.62/2.7-Gb/s Adaptive Transmitter With Two-Tap Preemphasis Using a Propagation-Time Detector

Shih-Yuan Kao, Shen-Iuan Liu

Journal:

IEEE Transactions on Circuits and Systems II: Express Briefs

Year:

2010

Language:

english

File:

PDF, 847 KB

english, 2010

71

An 8-bit 20-MS/s ZCBC Time-Domain Analog-to-Digital Data Converter

I-Hsin Wang, Hwei-Yu Lee, Shen-Iuan Liu

Journal:

IEEE Transactions on Circuits and Systems II: Express Briefs

Year:

2009

Language:

english

File:

PDF, 396 KB

english, 2009

72

A 20-MHz to 3-GHz Wide-Range Multiphase Delay-Locked Loop

Chi-Nan Chuang, Shen-Iuan Liu

Journal:

IEEE Transactions on Circuits and Systems II: Express Briefs

Year:

2009

Language:

english

File:

PDF, 618 KB

english, 2009

73

A Leakage-Compensated PLL in 65-nm CMOS Technology

Chao-Ching Hung, Shen-Iuan Liu

Journal:

IEEE Transactions on Circuits and Systems II: Express Briefs

Year:

2009

Language:

english

File:

PDF, 857 KB

english, 2009

74

A 104- to 112.8-GHz CMOS Injection-Locked Frequency Divider

I-Ting Lee, Kun-Hung Tsai, Shen-Iuan Liu

Journal:

IEEE Transactions on Circuits and Systems II: Express Briefs

Year:

2009

Language:

english

File:

PDF, 750 KB

english, 2009

75

Comments on "A 10-Gb/s Inductorless CMOS Analog Equalizer With an Interleaved Active Feedback Topology

Jian-Hao Lu, Ke-Hou Chen, Shen-Iuan Liu

Journal:

IEEE Transactions on Circuits and Systems II: Express Briefs

Year:

2009

Language:

english

File:

PDF, 53 KB

english, 2009

76

A 10-Gb/s Inductorless CMOS Analog Equalizer With an Interleaved Active Feedback Topology

Jian-Hao Lu, Ke-Hou Chen, Shen-Iuan Liu

Journal:

IEEE Transactions on Circuits and Systems II: Express Briefs

Year:

2009

Language:

english

File:

PDF, 646 KB

english, 2009

77

A Phase-Locked Loop With Self-Calibrated Charge Pumps in 3- LTPS-TFT Technology

Wei-Ming Lin, Shen-Iuan Liu, Chun-Hung Kuo, Chun-Huai Li, Yao-Jen Hsieh, Chun-Ting Liu

Journal:

IEEE Transactions on Circuits and Systems II: Express Briefs

Year:

2009

Language:

english

File:

PDF, 595 KB

english, 2009

78

Analysis and Design of D-Band Injection-Locked Frequency Dividers

Bo-Yu Lin, Shen-Iuan Liu

Journal:

IEEE Journal of Solid-State Circuits

Year:

2011

Language:

english

File:

PDF, 3.77 MB

english, 2011

79

A 132.6-GHz Phase-Locked Loop in 65 nm Digital CMOS

Bo-Yu Lin, Shen-Iuan Liu

Journal:

IEEE Transactions on Circuits and Systems II: Express Briefs

Year:

2011

Language:

english

File:

PDF, 736 KB

english, 2011

80

[IEEE 2008 IEEE Symposium on VLSI Circuits - Honolulu, HI, USA (2008.06.18-2008.06.20)] 2008 IEEE Symposium on VLSI Circuits - 93.5∼109.4GHz CMOS injection-locked frequency divider with 15.3% locking range

Lan-Chou Cho,, Kun-Hung Tsai,, Chao-Ching Hung,, Shen-Iuan Liu,

Year:

2008

Language:

english

File:

PDF, 382 KB

english, 2008

81

Analysis of on-chip spiral inductors using the distributed capacitance model

Chia-Hsin Wu, Chih-Chun Tang, Shen-Iuan Liu

Journal:

IEEE Journal of Solid-State Circuits

Year:

2003

Language:

english

File:

PDF, 809 KB

english, 2003

82

Selective metal parallel shunting inductor and its VCO application

Chia-Hsin Wu, Chun-Yi Kuo, Shen-Iuan Liu

Journal:

IEEE Transactions on Circuits and Systems I: Regular Papers

Year:

2005

Language:

english

File:

PDF, 831 KB

english, 2005

83

Current-mode pseudo-exponential circuit with tunable input range

Chang, Cheng-Chieh, Liu, Shen-Iuan

Journal:

Electronics Letters

Year:

2000

Language:

english

File:

PDF, 219 KB

english, 2000

84

CMOS wideband amplifiers using multiple inductive-series peaking technique

Chia-Hsin Wu, Chih-Hun Lee, Wei-Sheng Chen, Shen-Iuan Liu

Journal:

IEEE Journal of Solid-State Circuits

Year:

2005

Language:

english

File:

PDF, 523 KB

english, 2005

85

A wide-range and fast-locking all-digital cycle-controlled delay-locked loop

Hsiang-Hui Chang, Shen-Iuan Liu

Journal:

IEEE Journal of Solid-State Circuits

Year:

2005

Language:

english

File:

PDF, 1.09 MB

english, 2005

86

A single-path pulsewidth control loop with a built-in delay-locked loop

Sung-Rung Han, Shen-Iuan Liu

Journal:

IEEE Journal of Solid-State Circuits

Year:

2005

Language:

english

File:

PDF, 758 KB

english, 2005

87

All-digital delay-locked loop/pulsewidth-control loop with adjustable duty cycles

You-Jen Wang, Shao-Ku Kao, Shen-Iuan Liu

Journal:

IEEE Journal of Solid-State Circuits

Year:

2006

Language:

english

File:

PDF, 1.39 MB

english, 2006

88

A 0.7-2-GHz self-calibrated multiphase delay-locked loop

Hsiang-Hui Chang, Jung-Yu Chang, Chun-Yi Kuo, Shen-Iuan Liu

Journal:

IEEE Journal of Solid-State Circuits

Year:

2006

Language:

english

File:

PDF, 2.35 MB

english, 2006

89

A 155.52 mbps-3.125 gbps continuous-rate clock and data recovery circuit

Rong-Jyi Yang, Kuan-Hua Chao, Sy-Chyuan Hwu, Chuan-Kang Liang, Shen-Iuan Liu

Journal:

IEEE Journal of Solid-State Circuits

Year:

2006

Language:

english

File:

PDF, 2.48 MB

english, 2006

90

A Calibrated Pulse Generator for Impulse-Radio UWB Applications

Che-Fu Liang, Shih-Tsai Liu, Shen-Iuan Liu

Journal:

IEEE Journal of Solid-State Circuits

Year:

2006

Language:

english

File:

PDF, 2.13 MB

english, 2006

91

A 2.5 GHz All-Digital Delay-Locked Loop in 0.13 μm CMOS Technology

Yang Rong-Jyi, Liu Shen-Iuan

Journal:

IEEE Journal of Solid-State Circuits

Year:

2007

Language:

english

File:

PDF, 2.08 MB

english, 2007

92

Introduction to the Special Issue on the 2008 IEEE International Solid-State Circuits Conference

Tsukamoto, S., Shen-Iuan Liu, Heinen, S., Thewes, R., Jri Lee

Journal:

IEEE Journal of Solid-State Circuits

Year:

2008

Language:

english

File:

PDF, 1.01 MB

english, 2008

93

A Jitter-Tolerance-Enhanced CDR Using a GDCO-Based Phase Detector

Che-Fu Liang, Sy-Chyuan Hwu, Shen-Iuan Liu

Journal:

IEEE Journal of Solid-State Circuits

Year:

2008

Language:

english

File:

PDF, 3.16 MB

english, 2008

94

A Merged CMOS Digital Near-End Crosstalk Canceller and Analog Equalizer for Multi-Lane Serial-Link Receivers

Jian-Hao Lu, Shen-Iuan Liu

Journal:

IEEE Journal of Solid-State Circuits

Year:

2010

Language:

english

File:

PDF, 2.18 MB

english, 2010

95

A 1.5 GHz All-Digital Spread-Spectrum Clock Generator

Sheng-You Lin, Shen-Iuan Liu

Journal:

IEEE Journal of Solid-State Circuits

Year:

2009

Language:

english

File:

PDF, 1.56 MB

english, 2009

96

G-Band Injection-Locked Frequency Dividers Using -type LC Networks

I-Ting Lee, Shen-Iuan Liu

Journal:

IEEE Transactions on Circuits and Systems I: Regular Papers

Year:

2012

Language:

english

File:

PDF, 2.12 MB

english, 2012

97

A wide-range delay-locked loop with a fixed latency of one clock cycle

Hsiang-Hui Chang, Jyh-Woei Lin, Ching-Yuan Yang, Shen-Iuan Liu

Journal:

IEEE Journal of Solid-State Circuits

Year:

2002

Language:

english

File:

PDF, 315 KB

english, 2002

98

A 0.5–5-GHz Wide-Range Multiphase DLL With a Calibrated Charge Pump

Chi-Nan Chuang, Shen-Iuan Liu

Journal:

IEEE Transactions on Circuits and Systems II: Express Briefs

Year:

2007

Language:

english

File:

PDF, 2.37 MB

english, 2007

99

[Japan Soc. Appl. Phys 2003 Symposium on VLSI Circuits. Digest of Technical Papers - Kyoto, Japan (12-14 June 2003)] 2003 Symposium on VLSI Circuits. Digest of Technical Papers (IEEE Cat. No.03CH37408) - Selective metal parallel shunting inductor and its VCO application

Chia-Hsin Wu,, Chun-Yi Kuo,, Shen-Iuan Liu,

Year:

2003

Language:

english

File:

PDF, 288 KB

english, 2003

100

A 1–16-Gb/s Wide-Range Clock/Data Recovery Circuit With a Bidirectional Frequency Detector

Chang-Lin Hsieh, Shen-Iuan Liu

Journal:

IEEE Transactions on Circuits and Systems II: Express Briefs

Year:

2011

Language:

english

File:

PDF, 495 KB

english, 2011