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51

[International Series on Advances in Solid State Electronics and Technology] The Physics and Modeling of Mosfets Volume 0 (Surface-Potential Model HiSIM) || Basic Compact Surface-Potential Model of the MOSFET

Miura-Mattausch, Mitiko, Mattausch, Hans Jürgen, Ezaki, Tatsuya

Year:

2008

Language:

english

File:

PDF, 9.85 MB

english, 2008

52

Compact Modeling of Dynamic MOSFET Degradation Due to Hot-Electrons

Tanoue, H., Tanaka, A., Oodate, Y., Nakahagi, T., Sugiyama, D., Ma, C., Mattausch, H. J., Miura-Mattausch, M.

Journal:

IEEE Transactions on Device and Materials Reliability

Year:

2017

Language:

english

File:

PDF, 1.33 MB

english, 2017

53

[International Series on Advances in Solid State Electronics and Technology] The Physics and Modeling of Mosfets Volume 0 (Surface-Potential Model HiSIM) || Leakage Currents and Junction Diode

Miura-Mattausch, Mitiko, Mattausch, Hans Jürgen, Ezaki, Tatsuya

Year:

2008

Language:

english

File:

PDF, 2.57 MB

english, 2008

54

[International Series on Advances in Solid State Electronics and Technology] The Physics and Modeling of Mosfets Volume 0 (Surface-Potential Model HiSIM) || Capacitances

Miura-Mattausch, Mitiko, Mattausch, Hans Jürgen, Ezaki, Tatsuya

Year:

2008

Language:

english

File:

PDF, 1.26 MB

english, 2008

55

Compact modeling of dynamic trap density evolution for predicting circuit-performance aging

Miura-Mattausch, M., Miyamoto, H., Kikuchihara, H., Maiti, T.K., Rohbani, N., Navarro, D., Mattausch, H.J.

Journal:

Microelectronics Reliability

Year:

2018

Language:

english

File:

PDF, 1.93 MB

english, 2018

56

Compact modeling of SiC Schottky barrier diode and its extension to junction barrier Schottky diode

Navarro, Dondee, Herrera, Fernando, Zenitani, Hiroshi, Miura-Mattausch, Mitiko, Yorino, Naoto, Mattausch, Hans Jürgen, Takusagawa, Mamoru, Kobayashi, Jun, Hara, Masafumi

Journal:

Japanese Journal of Applied Physics

Year:

2018

Language:

english

File:

PDF, 1.61 MB

english, 2018

57

Analysis and Compact Modeling of Temperature-Dependent Switching in SiC IGBT Circuits

Matsuura, Kai, Tanimoto, Yuta, Saito, Atsushi, Miyaoku, Yosuke, Mizoguchi, Takeshi, Miura-Mattausch, Mitiko, Jürgen Mattausch, Hans

Journal:

Solid-State Electronics

Year:

2018

Language:

english

File:

PDF, 1.37 MB

english, 2018

58

[IEEE 2019 2nd International Symposium on Devices, Circuits and Systems (ISDCS) - Higashi-Hiroshima, Japan (2019.3.6-2019.3.8)] 2019 2nd International Symposium on Devices, Circuits and Systems (ISDCS) - Modeling of Photocurrent Response for Integrated Optoelectric Circuit Simulation

Shintaku, Yasuhiro, Kusu, Shota, Miyoshi, Teppei, Suzuki, Gaku, Konno, Kohkichi, Miura-Mattausch, Mitiko

Year:

2019

Language:

english

File:

PDF, 341 KB

english, 2019

59

[IEEE 2019 Electron Devices Technology and Manufacturing Conference (EDTM) - Singapore, Singapore (2019.3.12-2019.3.15)] 2019 Electron Devices Technology and Manufacturing Conference (EDTM) - Compact Modeling for Leading-Edge Thin-Layer MOSFETs with Additional Applicability in Device optimization toward Suppressed Short-Channel Effects

Herrera, Fernando Avila, Hirano, Yoko, Iizuka, Takahiro, Miura-Mattausch, Mitiko, Kikuchihara, Hideyuki, Navarro, Dondee, Mattausch, Hans Jurgen, Ito, Akira

Year:

2019

Language:

english

File:

PDF, 142 KB

english, 2019

60

Surface-Property Recognition With Force Sensors for Stable Walking of Humanoid Robot

Bhattacharya, Sandip, Luo, Aiwen, Maiti, Tapas Kumar, Dutta, Sunandan, Ochi, Yoshihiro, Miura-Mattausch, Mitiko, Jurgen Mattausch, Hans

Journal:

Year:

2019

Language:

english

File:

PDF, 2.29 MB

english, 2019

61

Influence of laser intensity on carrier generation in MOSFETs

M Tanaka, T Okagaki, M Miura-Mattausch

Journal:

Physica B: Condensed Matter

Year:

1999

Language:

english

File:

PDF, 134 KB

english, 1999

62

A Gate-Current Model for Advanced MOSFET Technologies Implemented into HiSIM2

Ryosuke Inagaki, Norio Sadachika, Dondee Navarro, Mitiko Miura-Mattausch, Yasuaki Inoue

Journal:

IEEJ Transactions on Electrical and Electronic Engineering

Year:

2008

Language:

english

File:

PDF, 261 KB

english, 2008

63

A Bulk-Current Model for Advanced MOSFET Technologies Without Binning: Substrate Current and Fowler-Nordheim Current

Ryosuke Inagaki, Norio Sadachika, Dondee Navarro, Mitiko Miura-Mattausch, Yasuaki Inoue

Journal:

IEEJ Transactions on Electrical and Electronic Engineering

Year:

2010

Language:

english

File:

PDF, 1.84 MB

english, 2010

64

Limit of validity of the drift-diffusion approximation for simulation of photodiode characteristics

Konno, K., Matsushima, O., Navarro, D., Miura-Mattausch, M.

Journal:

Applied Physics Letters

Year:

2004

Language:

english

File:

PDF, 437 KB

english, 2004

65

Gate currents in thin oxide MOSFETs

Miura-mattausch, M., Schwerin, A.V., Weber, W., Werner, C., Dorda, G.

Journal:

IEE Proceedings I Solid State and Electron Devices

Year:

1987

Language:

english

File:

PDF, 567 KB

english, 1987

66

MOSFET modeling gets physical

Miura-Mattausch, M., Mattausch, H.J., Arora, N.D., Yang, C.Y.

Journal:

IEEE Circuits and Devices Magazine

Year:

2001

Language:

english

File:

PDF, 388 KB

english, 2001

67

HiSIM2 Circuit simulation - Solving the speed versus accuracy crisis

Mattausch, H.J., Miyake, M., Navarro, D., Sadachika, N., Ezaki, T., Miura-Mattausch, M., Yoshida, T., Hazama, S.

Journal:

IEEE Circuits and Devices Magazine

Year:

2006

Language:

english

File:

PDF, 1.92 MB

english, 2006

68

[IEEE 2006 International Electron Devices Meeting - San Francisco, CA, USA (2006.12.11-2006.12.13)] 2006 International Electron Devices Meeting - Physics-Based Photodiode Model Enabling Consistent Opto-Electronic Circuit Simulation

Ezaki, T., Suzuki, G., Konno, K., Matsushima, O., Mizukane, Y., Navarro, D., Miyake, M., Sadachika, N., Mattausch, H. J., Miura-Mattausch, M.

Year:

2006

Language:

english

File:

PDF, 373 KB

english, 2006

69

[IEEE 2012 IEEE International Conference on Microelectronic Test Structures (ICMTS) - San Diego, CA, USA (2012.03.19-2012.03.22)] 2012 IEEE International Conference on Microelectronic Test Structures - Compact thermal-interaction model for dynamic within chip temperature determination by circuit simulation

Ishiguro, K., Ueno, A., Toda, A., Miyake, M., Mattausch, H. J., Miura-Mattausch, M., Matsuzawa, K., Iizuka, T., Yamaguchi, S., Hoshida, T., Kinoshita, A., Arakawa, T.

Year:

2012

Language:

english

File:

PDF, 1.37 MB

english, 2012

70

Modeling of the Impurity-Gradient Effect in High-Voltage Laterally Diffused MOSFETs

Iizuka, Takahiro, Fukushima, Kenji, Tanaka, Akihiro, Sakuda, Takashi, Kikuchihara, Hideyuki, Miyake, Masataka, Mattausch, Hans Jürgen, Miura-Mattausch, Mitiko

Journal:

IEEE Transactions on Electron Devices

Year:

2013

Language:

english

File:

PDF, 1.44 MB

english, 2013

71

[IEEE 2010 IEEE International SOI Conference - San Diego, CA, USA (2010.10.11-2010.10.14)] 2010 IEEE International SOI Conference (SOI) - Analysis of SOI MOSFET physics for compact modeling

Baba, S., Ida, J., Tani, K., Chiba, T., Igarashi, Y., Sakamoto, K., Miura-Mattausch, M.

Year:

2010

Language:

english

File:

PDF, 704 KB

english, 2010

72

Compact Modeling of SOI MOSFETs With Ultrathin Silicon and BOX Layers

Miura-Mattausch, Mitiko, Feldmann, Uwe, Fukunaga, Yukiya, Miyake, Masataka, Kikuchihara, Hideyuki, Ueno, Fumiya, Mattausch, Hans Jurgen, Nakagawa, Tadashi, Sugii, Nobuyuki

Journal:

IEEE Transactions on Electron Devices

Year:

2014

Language:

english

File:

PDF, 1.89 MB

english, 2014

73

The Second-Generation of HiSIM_HV Compact Models for High-Voltage MOSFETs

Mattausch, Hans Jürgen, Miyake, M., Iizuka, T., Kikuchihara, H., Miura-Mattausch, Mitiko

Journal:

IEEE Transactions on Electron Devices

Year:

2013

Language:

english

File:

PDF, 1.88 MB

english, 2013

74

[IEEE 2007 14th International Conference on Mixed Design of Integrated Circuits and Systems - Ciechocinek, Poland (2007.06.21-2007.06.23)] 2007 14th International Conference on Mixed Design of Integrated Circuits and Systems - STARC's Semiconductor Design Technology Research Activities and the HiSIM2 Advanced MOSFET Model Project

Furui, Y., Miura-Mattausch, M., Sadachika, N., Miyake, M., Ezaki, T., Mattausch, H.J., Ohguro, T., Iizuka, T., Inagaki, R., Fudanuki, N.

Year:

2007

Language:

english

File:

PDF, 752 KB

english, 2007

75

[IEEE 2013 IEEE International Conference on Microelectronic Test Structures (ICMTS) - Osaka, Japan (2013.3.25-2013.3.28)] 2013 IEEE International Conference on Microelectronic Test Structures (ICMTS) - Die-to-die and within-die variation extraction for circuit simulation with surface-potential compact model

Ohnari, Y., Khan, A. A., Dutta, A., Miura-Mattausch, M., Mattausch, H. J.

Year:

2013

Language:

english

File:

PDF, 1.36 MB

english, 2013

76

[IEEE 2011 International Conference on Simulation of Semiconductor Processes and Devices (SISPAD) - Osaka, Japan (2011.09.8-2011.09.10)] 2011 International Conference on Simulation of Semiconductor Processes and Devices - Modeling of enhanced 1/ƒ noise in TFT with trap charges

Nakahagi, T., Sugiyama, D., Yukuta, S., Miyake, M., Miura-Mattausch, M., Miyano, S.

Year:

2011

Language:

english

File:

PDF, 1.01 MB

english, 2011

77

[IEEE 1989 International Conference on Microelectronic Test Structures - Edinburgh, UK (13-14 March 1989)] Proceedings of the 1989 International Conference on Microelectronic Test Structures - Area-periphery partitioning of currents in self-aligned silicon bipolar transistors

Fertsch, J., Weng, J., Miura-Mattausch, M.

Year:

1989

Language:

english

File:

PDF, 326 KB

english, 1989

78

[IEEE ASP-DAC 2001. Asia and South Pacific Design Automation Conference 2001 - Yokohama, Japan (30 Jan.-2 Feb. 2001)] Proceedings of the ASP-DAC 2001. Asia and South Pacific Design Automation Conference 2001 (Cat. No.01EX455) - Correlation method of circuit-performance and technology fluctuations for improved design reliability

Miyawaki, D., Matsumoto, S., Mattausch, H.J., Ooshiro, S., Suetake, M., Miura-Mattausch, M., Kumashiro, S., Yamaguchi, T., Yamashita, K., Nakayama, N.

Year:

2001

Language:

english

File:

PDF, 471 KB

english, 2001

79

[IEEE 2013 IEEE International Conference on Electronics, Computing and Communication Technologies (CONECCT) - Bangalore, India (2013.01.17-2013.01.19)] 2013 IEEE International Conference on Electronics, Computing and Communication Technologies - Die-to-die and within-die fabrication variation of 65nm CMOS technology PMOS transistors

Khan, Aftab Alam, Ohnari, Yoshihiro, Dutta, Ashudeb, Singh, Shivgovind, Miura-Mattausch, Mitiko, Mattausch, Hans Jurgen

Year:

2013

Language:

english

File:

PDF, 805 KB

english, 2013

80

Importance of ballistic carriers for the dynamic response in sub-100 nm MOSFETs

Okagaki, T., Tanaka, M., Ueno, H., Miura-Mattausch, M.

Journal:

IEEE Electron Device Letters

Year:

2002

Language:

english

File:

PDF, 238 KB

english, 2002

81

[IEEE 2007 5th International Conference on Communications, Circuits and Systems - Kokura (2007.07.11-2007.07.13)] 2007 International Conference on Communications, Circuits and Systems - A GIDL-Current Model for Advanced MOSFET Technologies Implemented into HiSIM2

Inagaki, R., Miura-Mattausch, M., Inoue, Y.

Year:

2007

Language:

english

File:

PDF, 2.57 MB

english, 2007

82

[IEEE 2008 IEEE International SOI Conference - New Paltz, NY (2008.10.6-2008.10.9)] 2008 IEEE International SOI Conference - Consistent dynamic depletion model of SOI-MOSFETs for device/circuit optimization

Kusu, S., Ishimura, K., Ohyama, K., Miyoshi, T., Hori, D., Sadachika, N., Murakami, T., Ando, M., Mattausch, H. J., Miura-Mattausch, M., Baba, S., Ida, J.

Year:

2008

Language:

english

File:

PDF, 191 KB

english, 2008

83

[IEEE 1998 Asia and South Pacific Design Automation Conference - Yokohama, Japan (10-13 Feb. 1998)] Proceedings of 1998 Asia and South Pacific Design Automation Conference - Reliable threshold voltage determination for sub-0.1 μm gate length MOSFETs

Tsuno, M., Suga, M., Tanaka, M., Shibahara, K., Miura-Mattausch, M., Hirose, M.

Year:

1998

Language:

english

File:

PDF, 526 KB

english, 1998

84

[IEEE 2013 International Conference on Simulation of Semiconductor Processes and Devices (SISPAD) - Glasgow, United Kingdom (2013.09.3-2013.09.5)] 2013 International Conference on Simulation of Semiconductor Processes and Devices (SISPAD) - Compact modeling of SOI MOSFETs with ultra thin silicon and BOX layers for ultra low power applications

Fukunaga, Y., Miura-Mattausch, M., Feldmann, U., Kikuchiharasa, H., Miyake, M., Mattausch, H. J., Nakagawa, T.

Year:

2013

Language:

english

File:

PDF, 1.17 MB

english, 2013

85

[IEEE 2009 International Conference on Simulation of Semiconductor Processes and Devices (SISPAD) - San Diego, CA, USA (2009.09.9-2009.09.11)] 2009 International Conference on Simulation of Semiconductor Processes and Devices - Effect of Impact-Ionization-Generated Holes on the Breakdown Mechanism in LDMOS Devices

Sakuda, T., Sadachika, N., Oritsuki, Y., Yokomichi, M., Miyake, M., Kajiwara, T., Kikuchihara, H., Feldmann, U., Mattausch, H. J., Miura-Mattausch, M.

Year:

2009

Language:

english

File:

PDF, 856 KB

english, 2009

86

A 1- mu m polysilicon self-aligning bipolar process for low-power high-speed integrated circuits

Kabza, H., Ehinger, K., Meister, T.F., Meul, H.-W., Weger, P., Kerner, I., Miura-Mattausch, M., Schreiter, R., Hartwig, D., Reisch, M., Ohnemus, M., Kopl, R., Weng, J., Klose, H., Schaber, H., Treitin

Journal:

IEEE Electron Device Letters

Year:

1989

Language:

english

File:

PDF, 241 KB

english, 1989

87

[IEEE 1998 Sixth International Workshop on Computational Electronics. Extended Abstracts - Osaka, Japan (19-21 Oct. 1998)] 1998 Sixth International Workshop on Computational Electronics. Extended Abstracts (Cat. No.98EX116) - Understanding conductance quantization in thin SOI MOSFET by quantized-energy-level simulation

Takahashi, T., Miura-Mattausch, M., Omura, Y.

Year:

1998

Language:

english

File:

PDF, 359 KB

english, 1998

88

[IEEE 2008 IEEE Power Electronics Specialists Conference - PESC 2008 - Rhodes, Greece (2008.06.15-2008.06.19)] 2008 IEEE Power Electronics Specialists Conference - A consistently potential distribution oriented compact IGBT model

Miyake, M., Ohashi, A., Yokomichi, M., Masuoka, H., Kajiwara, T., Sadachika, N., Feldmann, U., Mattausch, H. J., Miura-Mattausch, M., Kojima, T., Shoji, T., Nishibe, Y.

Year:

2008

Language:

english

File:

PDF, 446 KB

english, 2008

89

[IEEE 2013 IEEE International Reliability Physics Symposium (IRPS) - Anaheim, CA (2013.4.14-2013.4.18)] 2013 IEEE International Reliability Physics Symposium (IRPS) - Compact reliability model for degradation of advanced p-MOSFETs due to NBTI and hot-carrier effects in the circuit simulation

Ma, C., Mattausch, H. J., Miyake, M., Iizuka, T., Miura-Mattausch, M., Matsuzawa, K., Yamaguchi, S., Hoshida, T., Imade, M., Koh, R., Arakawa, T., He, J.

Year:

2013

Language:

english

File:

PDF, 350 KB

english, 2013

90

[Japan Soc. Appl. Phys International Conference on Simulation of Semiconductor Process and Devices. SISPAD 99 - Kyoto, Japan (6-8 Sept. 1999)] 1999 International Conference on Simulation of Semiconductor Processes and Devices. SISPAD'99 (IEEE Cat. No.99TH8387) - Precise physical modeling of the reverse-short-channel effect for circuit simulation

Suetake, M., Miura-Mattausch, M., Mattausch, H.J., Kumashiro, S., Shigyo, N., Odanaka, S., Nakayama, N.

Year:

1999

Language:

english

File:

PDF, 259 KB

english, 1999

91

[IEEE 2013 IEEE 14th Workshop on Control and Modeling for Power Electronics (COMPEL) - Salt Lake City, UT, USA (2013.06.23-2013.06.26)] 2013 IEEE 14th Workshop on Control and Modeling for Power Electronics (COMPEL) - Modeling of injection enhanced IGBT for accurate of switching performance

Yamamoto, Takao, Kato, Hisato, Miyake, Masataka, Feldmann, Uwe, Mattausch, Hans Jurgen, Miura-Mattausch, Mitiko

Year:

2013

Language:

english

File:

PDF, 887 KB

english, 2013

92

[IEEE 1998 Asia and South Pacific Design Automation Conference - Yokohama, Japan (10-13 Feb. 1998)] Proceedings of 1998 Asia and South Pacific Design Automation Conference - Concurrent technology, device, and circuit development for EEPROMs

Feldmann, U., Kakoschke, R., Miura-Mattausch, M., Schraud, G.

Year:

1998

Language:

english

File:

PDF, 564 KB

english, 1998

93

[IEEE Conference of Asia and South Pacific Design Automation 2003 - Kitakyushu, Japan (21-24 Jan. 2003)] Proceedings of the ASP-DAC Asia and South Pacific Design Automation Conference, 2003. - Temperature-independence-point properties for 0.1 μm-scale pocket-implant technologies and the impact on circuit design

Hisamitsu, K., Ueno, H., Tanaka, M., Kitamaru, D., Miura-Mattausch, M., Mattausch, H.J., Kumashiro, S., Yamaguchi, T., Yamashita, K., Nakayama, N.

Year:

2003

Language:

english

File:

PDF, 415 KB

english, 2003

94

[IEEE [1993 International Workshop on VLSI Process and Device Modeling (1993 VPAD) - Nara, Japan (May 14-15, 1993)] [Proceedings] 1993 International Workshop on VLSI Process and Device Modeling (1993 VPAD) - A New Consistent Description Of MOSFET Performance For Circuit Simulation

Miura-Mattausch, M., Bergner, W.

Year:

1993

Language:

english

File:

PDF, 154 KB

english, 1993

95

[IEEE IEEE 2005 Custom Integrated Circuits Conference, 2005. - San Jose, CA, USA (Sept. 18-21, 2005)] Proceedings of the IEEE 2005 Custom Integrated Circuits Conference, 2005. - MOSFET harmonic distortion analysis up to the non-quasi-static frequency regime

Takeda, Y., Navarro, D., Chiba, S., Miura-Mattausch, M., Mattausch, H.J., Ohguro, T., Iizuka, T., Taguchi, M., Kumashiro, S., Miyamoto, S.

Year:

2005

Language:

english

File:

PDF, 353 KB

english, 2005

96

[IEEE ASP-DAC2000: Asia and South Pacific Design Automation Conference 2000 - Yokohama, Japan (25-28 Jan. 2000)] Proceedings 2000. Design Automation Conference. (IEEE Cat. No.00CH37106) - High performance of short-channel MOSFETs due to an elevated central-channel doping

Tanaka, M., Tokida, N., Okagaki, T., Miura-Mattausch, M., Hansch, W., Mattausch, H.J.

Year:

2000

Language:

english

File:

PDF, 457 KB

english, 2000

97

Correlating Microscopic and Macroscopic Variation With Surface-Potential Compact Model

Mattausch, H.J., Sadachika, N., Yumisaki, A., Kaya, A., Imafuku, W., Johguchi, K., Koide, T., Miura-Mattausch, M.

Journal:

IEEE Electron Device Letters

Year:

2009

Language:

english

File:

PDF, 377 KB

english, 2009

98

[IEEE 2012 IEEE International Conference on Microelectronic Test Structures (ICMTS) - San Diego, CA, USA (2012.03.19-2012.03.22)] 2012 IEEE International Conference on Microelectronic Test Structures - Experimental extraction of substrate-noise coupling between MOSFETs and its compact modeling for circuit simulation

Emoto, S., Miyoshi, T., Miyake, M., Mattausch, H. J., Miura-Mattausch, M., Iizuka, T., Sahara, Y., Hoshida, T., Matsuzawa, K., Arakawa, T.

Year:

2012

Language:

english

File:

PDF, 1.23 MB

english, 2012

99

[IEEE 2008 International Conference on Simulation of Semiconductor Processes and Devices (SISPAD 2008) - Hakone-Machi, Kanagawa (2008.09.9-2008.09.11)] 2008 International Conference on Simulation of Semiconductor Processes and Devices - A surface potential based poly-Si TFT model for circuit simulation

Soichiro Miyano,, Yoshiteru Shimizu,, Takahiro Murakami,, Miura-Mattausch, Mitiko

Year:

2008

Language:

english

File:

PDF, 824 KB

english, 2008

100

Transconductance oscillations in metal–oxide–semiconductor field-effect transistors with thin silicon-on-insulator originated by quantized energy levels

Takahashi, Tetsuyasu, Miura-Mattausch, Mitiko, Omura, Yasuhisa

Journal:

Applied Physics Letters

Year:

1999

Language:

english

File:

PDF, 301 KB

english, 1999