Using layout technique and direct-tunneling mechanism to...

Using layout technique and direct-tunneling mechanism to promote DC performance of partially depleted SOI devices

Shiao-Shien Chen, Shiang Huang-Lu, Tien-Hao Tang
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Volume:
51
Year:
2004
Language:
english
Pages:
6
DOI:
10.1109/ted.2004.825810
File:
PDF, 515 KB
english, 2004
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