CMOS scaling beyond the 100-nm node with...

CMOS scaling beyond the 100-nm node with silicon-dioxide-based gate dielectrics

Wu, E. Y., Nowak, E. J., Vayshenker, A., Lai, W. L., Harmon, D. L.
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Volume:
46
Language:
english
Journal:
IBM Journal of Research and Development
DOI:
10.1147/rd.462.0287
Date:
March, 2002
File:
PDF, 263 KB
english, 2002
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