On-chip measurement to analyze failure mechanisms of ICs...

Microelectronics Reliability 2013 / 9 Vol. 53; Iss. 9-11

On-chip measurement to analyze failure mechanisms of ICs under system level ESD stress

Caigneť, F., Nolhier, N., Bafleur, M., Wang, A., Mauran, N.
How much do you like this book?
What’s the quality of the file?
Download the book for quality assessment
What’s the quality of the downloaded files?
Volume:
53
Language:
english
Journal:
Microelectronics Reliability
DOI:
10.1016/j.microrel.2013.07.056
Date:
September, 2013
File:
PDF, 1.89 MB
english, 2013
Conversion to is in progress
Conversion to is failed