Gate-last integration on planar FDSOI for low-VTp and...

Microelectronic Engineering 2013 / 09 Vol. 109

Gate-last integration on planar FDSOI for low-VTp and low-EOT MOSFETs

Morvan, S., Andrieu, F., Leroux, C., Garros, X., Cassé, M., Martin, F., Gassilloud, R., Morand, Y., Le Royer, C., Besson, P., Roure, M.-C., Euvrard, C., Rivoire, M., Seignard, A., Desvoivres, L., Barn
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Volume:
109
Language:
english
Journal:
Microelectronic Engineering
DOI:
10.1016/j.mee.2013.03.045
Date:
September, 2013
File:
PDF, 816 KB
english, 2013
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