![](/img/cover-not-exists.png)
Interface Traps in InAs Nanowire Tunnel-FETs and MOSFETs—Part I: Model Description and Single Trap Analysis in Tunnel-FETs
Pala, Marco G., Esseni, DavidVolume:
60
Language:
english
Journal:
IEEE Transactions on Electron Devices
DOI:
10.1109/TED.2013.2274196
Date:
September, 2013
File:
PDF, 1.18 MB
english, 2013