Failure analysis and stress simulation in small multichip...

Failure analysis and stress simulation in small multichip BGAs

Moore, T.D., Jarvis, J.L.
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Volume:
24
Language:
english
Journal:
IEEE Transactions on Advanced Packaging
DOI:
10.1109/6040.928757
Date:
May, 2001
File:
PDF, 228 KB
english, 2001
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