![](/img/cover-not-exists.png)
Border-Trap Characterization in High-$\kappa$ Strained-Si MOSFETs
Debabrata Maji,, Duttagupta, S.P., Rao, V.R., Chia Ching Yeo,, Byung-Jin Cho,Volume:
28
Language:
english
Journal:
IEEE Electron Device Letters
DOI:
10.1109/led.2007.902086
Date:
August, 2007
File:
PDF, 122 KB
english, 2007