Border-Trap Characterization in High-$\kappa$ Strained-Si...

IEEE Electron Device Letters 2007 / 08 Vol. 28; Iss. 8

Border-Trap Characterization in High-$\kappa$ Strained-Si MOSFETs

Debabrata Maji,, Duttagupta, S.P., Rao, V.R., Chia Ching Yeo,, Byung-Jin Cho,
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Volume:
28
Language:
english
Journal:
IEEE Electron Device Letters
DOI:
10.1109/led.2007.902086
Date:
August, 2007
File:
PDF, 122 KB
english, 2007
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