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An investigation into warpages, stresses and keep-out zone in 3D through-silicon-via DRAM packages
Tsai, M.Y., Huang, P.S., Huang, C.Y., Lin, P.C., Huang, Lawrence, Chang, Michael, Shih, Steven, Lin, J.P.Volume:
54
Language:
english
Journal:
Microelectronics Reliability
DOI:
10.1016/j.microrel.2014.08.017
Date:
December, 2014
File:
PDF, 1.89 MB
english, 2014