Operational Voltage Reduction of Flash Memory Using...

IEEE Electron Device Letters 2008 / 03 Vol. 29; Iss. 3

Operational Voltage Reduction of Flash Memory Using High-$\kappa$ Composite Tunnel Barriers

Verma, Sarves, Pop, Eric, Kapur, Pawan, Parat, Krishna, Saraswat, Krishna C.
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Volume:
29
Language:
english
Journal:
IEEE Electron Device Letters
DOI:
10.1109/led.2007.915376
Date:
March, 2008
File:
PDF, 182 KB
english, 2008
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