3.9 ps SiGe HBT ECL ring oscillator and transistor design...

IEEE Electron Device Letters 2003 / 05 Vol. 24; Iss. 5

3.9 ps SiGe HBT ECL ring oscillator and transistor design for minimum gate delay

Jagannathan, B., Meghelli, M., Chan, K., Jae-Sung Rieh,, Schonenberg, K., Ahlgren, D., Subbanna, S., Freeman, G.
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Volume:
24
Language:
english
Journal:
IEEE Electron Device Letters
DOI:
10.1109/led.2003.812568
Date:
May, 2003
File:
PDF, 312 KB
english, 2003
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