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An example of fault site localization on a 0.18 μm CMOS device with combination of front and backside techniques
Yoshiteru Yamada, Hirotaka KomodaVolume:
44
Year:
2004
Language:
english
Pages:
8
DOI:
10.1016/j.microrel.2004.01.011
File:
PDF, 510 KB
english, 2004