ESD–RF co-design methodology for the state of the art...

Microelectronics Reliability 2005 Vol. 45; Iss. 2

ESD–RF co-design methodology for the state of the art RF-CMOS blocks

V. Vassilev, S. Thijs, P.L. Segura, P. Wambacq, P. Leroux, G. Groeseneken, M.I. Natarajan, H.E. Maes, M. Steyaert
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Volume:
45
Year:
2005
Language:
english
Pages:
14
DOI:
10.1016/j.microrel.2004.05.013
File:
PDF, 548 KB
english, 2005
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